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Optimal Free-Space Management and Routing-Conscious Dynamic Placement for Reconfigurable Devices
May 2007 (vol. 56 no. 5)
pp. 673-680
| ASCII Text | x | ||
| Ali Ahmadinia, Christophe Bobda, S?ndor P. Fekete, J? Teich, Jan C. van der Veen, "Optimal Free-Space Management and Routing-Conscious Dynamic Placement for Reconfigurable Devices," IEEE Transactions on Computers, vol. 56, no. 5, pp. 673-680, May, 2007. | |||
| BibTex | x | ||
| @article{ 10.1109/TC.2007.1028, author = {Ali Ahmadinia and Christophe Bobda and S?ndor P. Fekete and J? Teich and Jan C. van der Veen}, title = {Optimal Free-Space Management and Routing-Conscious Dynamic Placement for Reconfigurable Devices}, journal ={IEEE Transactions on Computers}, volume = {56}, number = {5}, issn = {0018-9340}, year = {2007}, pages = {673-680}, doi = {http://doi.ieeecomputersociety.org/10.1109/TC.2007.1028}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - JOUR JO - IEEE Transactions on Computers TI - Optimal Free-Space Management and Routing-Conscious Dynamic Placement for Reconfigurable Devices IS - 5 SN - 0018-9340 SP673 EP680 EPD - 673-680 A1 - Ali Ahmadinia, A1 - Christophe Bobda, A1 - S?ndor P. Fekete, A1 - J? Teich, A1 - Jan C. van der Veen, PY - 2007 KW - Reconfigurable hardware KW - field-programmable gate array (FPGA) KW - module placement KW - free-space manager KW - routing-conscious placement KW - geometric optimization KW - line-sweep technique KW - optimal runtime KW - lower bounds. VL - 56 JA - IEEE Transactions on Computers ER - | |||
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/TC.2007.1028
We describe algorithmic results on two crucial aspects of allocating resources on computational hardware devices with partial reconfigurability. By using methods from the field of computational geometry, we derive a method that allows correct maintenance of free and occupied space of a set of n rectangular modules in time O(n\log n); previous approaches needed a time of O(n^{2}) for correct results and O(n) for heuristic results. We also show a matching lower bound of \Omega(n\log n), so our approach is optimal. We also show that finding an optimal feasible communication-conscious placement (which minimizes the total weighted Manhattan distance between the new module and existing demand points) can be computed with \Theta(n\log n). Both resulting algorithms are practically easy to implement and show convincing experimental behavior.
Index Terms:
Reconfigurable hardware, field-programmable gate array (FPGA), module placement, free-space manager, routing-conscious placement, geometric optimization, line-sweep technique, optimal runtime, lower bounds.
Citation:
Ali Ahmadinia, Christophe Bobda, S?ndor P. Fekete, J? Teich, Jan C. van der Veen, "Optimal Free-Space Management and Routing-Conscious Dynamic Placement for Reconfigurable Devices," IEEE Transactions on Computers, vol. 56, no. 5, pp. 673-680, May 2007, doi:10.1109/TC.2007.1028
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