This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
Optimized Slowdown in Real-Time Task Systems
December 2006 (vol. 55 no. 12)
pp. 1588-1598
Slowdown factors determine the extent of slowdown a computing system can experience based on functional and performance requirements. Dynamic Voltage Scaling (DVS) of a processor based on slowdown factors can lead to considerable energy savings. We address the problem of computing slowdown factors for dynamically scheduled tasks with specified deadlines. We present an algorithm to compute a near optimal constant slowdown factor based on the bisection method. As a further generalization, for the case of tasks with varying power characteristics, we present the computation of near optimal slowdown factors as a solution to convex optimization problem using the ellipsoid method. The algorithms are practically fast and have the same time complexity as the algorithms to compute the feasibility of a task set. Our simulation results show an average 20 percent energy gain over known slowdown techniques using static slowdown factors and 40 percent gain with dynamic slowdown.

[1] H. Aydin, R. Melhem, D. Mossé, and P.M. Alvarez, “Dynamic and Aggressive Scheduling Techniques for Power-Aware Real-Time Systems,” Proc. IEEE Real-Time Systems Symp., pp. 95-105, Dec. 2001.
[2] Y. Shin and K. Choi, “Power Conscious Fixed Priority Scheduling for Hard Real-Time Systems,” Proc. Design Automation Conf., pp.134-139, June 1999.
[3] Y. Shin, K. Choi, and T. Sakurai, “Power Optimization of Real-Time Embedded Systems on Variable Speed Processors,” Proc. Int'l Conf. Computer Aided Design, pp. 365-368, Nov. 2000.
[4] Intel XScale Processor, Intel Inc., http://developer.intel.com/designintelxscale , June 2000.
[5] Transmeta Crusoe Processor, Transmeta Inc., http://www. transmeta.comcrusoe, Jan. 2000.
[6] J.M. Rabaey, A. Chandrakasan, and B. Nikolić, Digital Integrated Circuits. Prentice Hall, 2003.
[7] N. Weste and K. Eshraghian, Principles of CMOS VLSI Design. Addison Wesley, 1993.
[8] F. Yao, A.J. Demers, and S. Shenker, “A Scheduling Model for Reduced CPU Energy,” Proc. IEEE Symp. Foundations of Computer Science, pp. 374-382, 1995.
[9] W. Kwon and T. Kim, “Optimal Voltage Allocation Techniques for Dynamically Variable Voltage Processors,” Proc. Design Automation Conf., pp. 125-130, 2003.
[10] G. Quan and X. Hu, “Energy Efficient Fixed-Priority Scheduling for Real-Time Systems on Variable Voltage Processors,” Proc. Design Automation Conf., pp. 828-833, June 2001.
[11] G. Quan and X. Hu, “Minimum Energy Fixed-Priority Scheduling for Variable Voltage Processors,” Proc. Design Automation and Test in Europe, pp. 782-787, Mar. 2002.
[12] H. Yun and J. Kim, “On Energy-Optimal Voltage Scheduling for Fixed-Priority Hard Real-Time Systems,” ACM Trans. Embedded Computing Systems, vol. 2, no. 3, pp. 393-430, 2003.
[13] C. Rusu, R. Melhem, and D. Mosse, “Maximizing Rewards for Real-Time Applications with Energy Constraints,” ACM Trans. Embedded Computer Systems, vol. 2, pp. 537-559, Nov. 2003.
[14] C. Rusu, R. Melhem, and D. Mosse, “Maximizing the System Value while Satisfying Time and Energy Constraints,” Proc. IEEE Real-Time Systems Symp., pp. 246-255, Dec. 2002.
[15] J. Luo and N. Jha, “Power-Conscious Joint Scheduling of Periodic Task Graphs and Aperiodic Tasks in Distributed Real-Time Embedded Systems,” Proc. Int'l Conf. Computer Aided Design, pp.357-364, Nov. 2000.
[16] F. Gruian and K. Kuchcinski, “LEneS: Task Scheduling for Low-Energy Systems Using Variable Supply Voltage Processors,” Proc. Asia South Pacific Design Automation Conf., pp. 449-455, Jan. 2001.
[17] Y. Zhang, X.S. Hu, and D.Z. Chen, “Task Scheduling and Voltage Selection for Energy Minimization,” Proc. Design Automation Conf., pp. 183-188, 2002.
[18] F. Gruian, “Hard Real-Time Scheduling for Low-Energy Using Stochastic Data And DVS Processors,” Proc. Int'l Symp. Low Power Electronics and Design, pp. 46-51, Aug. 2001.
[19] H. Aydin, R. Melhem, D. Mossé, and P.M. Alvarez, “Determining Optimal Processor Speeds for Periodic Real-Time Tasks with Different Power Characteristics,” Proc. EuroMicro Conf. Real-Time Systems, pp. 225-232, June 2001.
[20] W. Kim, J. Kim, and S.L. Min, “A Dynamic Voltage Scaling Algorithm for Dynamic-Priority Hard Real-Time Systems Using Slack Time Analysis,” Proc. Design Automation and Test in Europe, pp. 788-794, Mar. 2002.
[21] P. Pillai and K.G. Shin, “Real-Time Dynamic Voltage Scaling for Low-Power Embedded Operating Systems,” Proc. 18th Symp. Operating Systems Principles, pp. 89-102, 2001.
[22] R. Jejurikar and R. Gupta, “Dual Mode Algorithm for Energy Aware Fixed Priority Scheduling with Task Synchronization,” Proc. Workshop Compilers and Operating System for Low Power, Sept. 2003.
[23] F. Zhang and S.T. Chanson, “Processor Voltage Scheduling for Real-Time Tasks with Non-Preemptible Sections,” Proc. IEEE Real-Time Systems Symp., pp. 235-245, Dec. 2002.
[24] P. Mejia-Alvarez, E. Levner, and D. Mosse, “Adaptive Scheduling Server for Power-Aware Real-Time Tasks,” ACM Trans. Embedded Computing Systems, vol. 2, no. 4, pp. 226-241, Nov. 2003.
[25] J.A. Butts and G.S. Sohi, “A Static Power Model for Architects,” Proc. Int'l Symp. Microarchitecture, 2000.
[26] R. Jejurikar, C. Pereira, and R. Gupta, “Leakage Aware Dynamic Voltage Scaling for Real-Time Embedded Systems,” Proc. Design Automation Conf., pp. 275-280, June 2004.
[27] Y. Lee, K.P. Reddy, and C.M. Krishna, “Scheduling Techniques for Reducing Leakage Power in Hard Real-Time Systems,” Proc. EuroMicro Conf. Real Time Systems, June 2003.
[28] G.C. Buttazzo, Hard Real-Time Computing Systems. Kluwer Academic, 1995.
[29] J.W.S. Liu, Real-Time Systems. Prentice Hall, 2000.
[30] U. Devi, “An Improved Schedulability Test for Uniprocessor Periodic Task Systems,” Proc. EuroMicro Conf. Real-Time Systems, June 2003.
[31] S.K. Baruah, R.R. Howell, and L.E. Rosier, “Algorithms and Complexity Concerning the Preemptive Scheduling of Periodic, Real-Time Tasks on One Processor,” IEEE Trans. Computers, vol. 40, 1991.
[32] Intel StrongARM Processor, Intel Inc., http://www.arm.com/armtechStrongARM, Oct. 2001.
[33] Q. Zheng and K.G. Shin, “On the Ability of Establishing Real-Time Channels in Point-to-Point Packet-Switched Networks,” IEEE Trans. Comm., vol. 42, nos. 2/3/4, pp. 1096-1105, Feb/Mar/Apr. 1994.
[34] M. Grotschel, L. Lovasz, and A. Schrijver, “Geometric Algorithms and Combinatorial Optimization,” Combinatorica, pp. 169-97, 1981.
[35] M. Grotschel, L. Lovasz, and A. Schrijver, Geometric Algorithms and Combinatorial Optimization. Springer Verlag, 1988.
[36] R. Jejurikar and R. Gupta, “Optimized Slowdown in Real-Time Task Systems,” CECS Technical Report #04-10, Univ. of California Irvine, Apr. 2004.

Index Terms:
EDF scheduling, real-time systems, low power scheduling, dynamic voltage scaling, slowdown factors, convex optimization.
Citation:
Ravindra Jejurikar, Rajesh Gupta, "Optimized Slowdown in Real-Time Task Systems," IEEE Transactions on Computers, vol. 55, no. 12, pp. 1588-1598, Dec. 2006, doi:10.1109/TC.2006.204
Usage of this product signifies your acceptance of the Terms of Use.