2005 Index IEEE Transactions on Computers Vol. 54
DECEMBER 2005 (Vol. 54, No. 12) pp. 1631-1648
0018-9340/05/$31.00 © 2005 IEEE

Published by the IEEE Computer Society
2005 Index IEEE Transactions on Computers Vol. 54
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This index covers all technical items—papers, correspondence, reviews, etc.—that appeared in this periodical during 2005, and items from previous years that were commented upon or corrected in 2005. Departments and other items may also be covered if they have been judged to have archival value.
The Author Index contains the primary entry for each item, listed under the first author's name. The primary entry includes the coauthors' names, the title of the paper or other item, and its location, specified by the publication abbreviation, year, month, and inclusive pagination. The Subject Index contains entries describing the item under all appropriate subject headings, plus the first author's name, the publication abbreviation, month, and year, and inclusive pages. Subject cross-references are included to assist in finding items of interest. Note that the item title is found only under the primary entry in the Author Index.

AUTHOR INDEX

A

Abdelzaher, T., see Huang, C., T-C Nov 20051422-1437

Abdul Gaffar, A., see Lee, D., T-C Dec 20051520-1531

Abel, J., and W. Teahan. Universal text preprocessing for data compression; T-C May 05497-507

Aggarwal, A., and M. Franklin. Instruction replication for reducing delays due to inter-PE communication latency; T-C Dec 20051496-1507

Alvarez, C., J. Corbal, and M. Valero. Fuzzy memoization for floating-point multimedia applications; T-C Jul 05922-927

Amar Mukherjee, see Tao, T., T-C Aug 2005929-938

Anastasiadis, S.V., P. Varman, J.S. Vitter, and Ke Yi. Optimal lexicographic shaping of aggregate streaming data; T-C Apr 05398-408

Animesh Datta, see Swarup Bhunia, T-C Jun 05752-766

Antelo, E., see Lang, T., T-C Mar 05347-361

Antelo, E., T. Lang, P. Montuschi, and A. Nannarelli. Digit-recurrence dividers with reduced logical depth; T-C Jul 05837-851

Aoyama, T., see Hariyama, M., T-C Jun 05642-650

Ardizzoni, E., A.A. Bertossi, M.C. Pinotti, S. Ramaprasad, R. Rizzi, and M.V.S. Shashanka. Optimal skewed data allocation on multiple channels with flat broadcast per channel; T-C May 05558-572

Armstrong, D.N., see Mutlu, O., T-C Dec 20051556-1571

Arnault, F., and T.P. Berger. Design and properties of a new pseudorandom generator based on a filtered FCSR automaton; T-C Nov 20051374-1383

Asanovic, K., see Tseng, J.H., T-C Jun 05741-751

Avresky, D., and N. Natchev. Dynamic reconfiguration in computer clusters with irregular topologies in the presence of multiple node and link failures; T-C May 05603-615

B

Bahk Saewoong, see Hyogon Kim, T-C Feb 2005238-240

Bajard, J.-C., see Schulte, M.J., T-C Mar 05241-242

Banerjee Nilanjan, see Swarup Bhunia, T-C Jun 05752-766

Banerjee Prith, see Sanghamitra Roy, T-C Jul 05886-896

Bao, F., see Feng, G.-L., T-C Sep 051071-1080

Bao, F., see Feng, G.-L., T-C Dec 20051473-1483

Barat, F., see Jayapala, M., T-C Jun 05672-683

Barnett, J.A. Dynamic task-level voltage scheduling optimizations; T-C May 05508-520

Baron, D., and Y. Bresler. Antisequential suffix sorting for BWT-based data compression; T-C Apr 05385-397

Bayraktaroglu, I., and A. Orailoglu. The construction of optimal deterministic partitionings in scan-based BIST fault diagnosis: mathematical foundations and cost-effective implementations; T-C Jan 200561-75

Berger, T.P., see Arnault, F., T-C Nov 20051374-1383

Bertossi, A.A., see Ardizzoni, E., T-C May 05558-572

Bhargava, V.K., see Khabbazian, M., T-C Nov 20051454-1459

Bhunia Swarup, see Swarup Bhunia, T-C Jun 05752-766

Bhuyan Laxmi Narayan, see Ravikumar, V.C., T-C May 05521-533

Bigang Li, see Jiwu Shu, T-C Apr 05439-448

Bique, S. New characterizations of 2D discrete cosine transform; T-C Sep 051054-1060

Biswas, P., and N.D. Dutt. Code size reduction in heterogeneous-connectivity-based DSPs using instruction set extensions; T-C Oct 20051216-1226

Boullis, N. , and A. Tisserand. Some optimizations of hardware multiplication by constant matrices; T-C Oct 20051271-1282

Bresler, Y., see Baron, D., T-C Apr 05385-397

Brisebarre, N., D. Defour, P. Kornerup, J.-M. Muller, and N. Revol. A new range-reduction algorithm; T-C Mar 05331-339

Brown, R.B., see Ravindran, R.A., T-C Aug 2005998-1012

Bruguera, J.D., see Pineiro, J.-A., T-C Mar 05304-318

Burleson, W.P., see Heath, M.W., T-C Dec 20051532-1546

Burns, J., and J.-L. Gaudiot. Area and system clock effects on SMT/CMP throughput; T-C Feb 2005141-152

Burtscher, M., I. Ganusov, S.J. Jackson, J. Ke, P. Ratanaworabhan, and N.B. Sam. The VPC trace-compression algorithms; T-C Nov 20051329-1344

Butler, J.T., T. Sasao, and M. Matsuura. Average path length of binary decision diagrams; T-C Sep 051041-1053

Buttazzo, G.C., see Caccamo, M., T-C Feb 2005198-213

Buttazzo, G.C., see Caccamo, M., T-C Jun 05783

Bystrov, A., see Sokolov, D., T-C Apr 05449-460

C

Caccamo, M., G.C. Buttazzo, and D.C. Thomas. Efficient reclaiming in reservation-based real-time systems with variable execution times; T-C Feb 2005198-213

Caccamo, M., G.C. Buttazzo, and D.C. Thomas. Correction to "Efficient reclaiming in reservation-based real-time systems with variable execution times" [Feb 05 198-213]; T-C Jun 05783

Calhoun, B.H., D.C. Daly, Naveen Verma, D.F. Finchelstein, D.D. Wentzloff, A. Wang, Seong-Hwan Cho, and A.P. Chandrakasan. Design considerations for ultra-low energy wireless microsensor nodes; T-C Jun 05727-740

Catthoor, F., see Kulkarni, C., T-C Jan 200576-81

Catthoor, F., see Jayapala, M., T-C Jun 05672-683

Chakrabarty, K., see Sabbineni, H., T-C Jan 200536-46

Chakrabarty, K., see Yi Zou, T-C Aug 2005978-991

Chandra, P., and A.J. Kshemkalyani. Causality-based predicate detection across space and time; T-C Nov 20051438-1453

Chandrakasan, A.P., see Calhoun, B.H., T-C Jun 05727-740

Chang, E.Y., see Dimitrijevic, Z., T-C Oct 20051314-1326

Chang, K.-Y., D. Hong, and H.-S. Cho. Low complexity bit-parallel multiplier for GF(2m) defined by all one polynomials using redundant representation; T-C Dec 20051628-1630

Chang Cheng, see Tei-Wei Kuo, T-C Jan 200547-60

Chang Chien-Ping, see Pao-Lien Lai, T-C Feb 2005165-175

Chao Yung-Sheng, see Tei-Wei Kuo, T-C Jan 200547-60

Chatterjee, M., G.D. Mandyam, and S.K. Das. Joint reliability of medium access control and radio link protocol in 3G CDMA systems; T-C Dec 20051584-1597

Chen, Y.-Y. Concurrent detection of control flow errors by hybrid signature monitoring; T-C Oct 20051298-1313

Cheng, A.C., and G.S. Tyson. An energy efficient instruction set synthesis framework for low power embedded system designs; T-C Jun 05698-713

Cheng Chang, see Tei-Wei Kuo, T-C Jan 200547-60

Chen Qingchun, see Qingchun Chen, T-C Sep 051182-1183

Chien-Ping Chang, see Pao-Lien Lai, T-C Feb 2005165-175

Chin, J., and M. Nourani. FITS: An integrated ILP-based test scheduling environment; T-C Dec 20051598-1613

Chin-Fu Kuo, see Tei-Wei Kuo, T-C Jan 200547-60

Chiou-Yng Lee, Jenn-Shyong Horng, I-Chang Jou, and Erl-Huei Lu. Low-complexity bit-parallel systolic Montgomery multipliers for special classes of GF(2m); T-C Sep 051061-1070

Cho, H.-S., see Chang, K.-Y., T-C Dec 20051628-1630

Cho Seong-Hwan, see Calhoun, B.H., T-C Jun 05727-740

Chouliaras, V.A., see Nunez-Yanez, J.L., T-C Nov 20051345-1359

Clark, N.T., H. Zhong, and S.A. Mahlke. Automated custom instruction generation for domain-specific processor acceleration; T-C Oct 20051258-1270

Conte, T.M., see Zhou, H., T-C Jul 05897-912

Corbal, J., see Alvarez, C., T-C Jul 05922-927

Corporaal, H., see Jayapala, M., T-C Jun 05672-683

Cotofana, S., C. Lageweg, and S. Vassiliadis. Addition related arithmetic operations via controlled transport of charge; T-C Mar 05243-256

D

Dai Yiqi, see Haining Fan, T-C Apr 05485-490

D'Alberto, P., A. Nicolau, A. Veidenbaum, and Rajesh Gupta. Line size adaptivity analysis of parameterized loop nests for direct mapped data cache; T-C Feb 2005185-197

Daly, D.C., see Calhoun, B.H., T-C Jun 05727-740

Daneshbeh, A.K., and M.A. Hasan. A class of unidirectional bit serial systolic architectures for multiplicative inversion and division over GF(2m); T-C Mar 05370-380

Danysh, A., and D. Tan. Architecture and implementation of a vector/SIMD multiply-accumulate unit; T-C Mar 05284-293

Darte, A., R. Schreiber, and G. Villard. Lattice-based memory allocation; T-C Oct 20051242-1257

Das, C.R., see Kim, E.J., T-C Jun 05660-671

Das, S.K., see Chatterjee, M., T-C Dec 20051584-1597

Dasika, G.S., see Ravindran, R.A., T-C Aug 2005998-1012

Datta, A. A fault-tolerant protocol for energy-efficient permutation routing in wireless networks; T-C Nov 20051409-1421

Datta Animesh, see Swarup Bhunia, T-C Jun 05752-766

Dean, A.G., see Welch, B., T-C Oct 20051188-1202

De Bosschere, K., see Vandierendonck, H., T-C Jul 05800-812

Deconinck, G., see Jayapala, M., T-C Jun 05672-683

de Dinechin, F., and A. Tisserand. Multipartite table methods; T-C Mar 05319-330

Defour, D., see Brisebarre, N., T-C Mar 05331-339

De Man, H., see Kulkarni, C., T-C Jan 200576-81

Deng, R.H., see Feng, G.-L., T-C Sep 051071-1080

Deng, R.H., see Feng, G.-L., T-C Dec 20051473-1483

Diaz, J.L., see Kim, K., T-C Nov 20051460-1466

Dimitrakopoulos, G., and D. Nikolos. High-speed parallel-prefix VLSI Ling adders; T-C Feb 2005225-231

Dimitrakopoulos, G., see Efstathiou, C., T-C Apr 05491-496

Dimitrijevic, Z., R. Rangaswami, and E.Y. Chang. Systems support for preemptive disk scheduling; T-C Oct 20051314-1326

Dimitrov, V., see Muscedere, R., T-C Mar 05257-271

Dubrova, E., see Teslenko, M., T-C Feb 2005236-237

Durresi, A., V.K. Paruchuri, S.S. Iyengar, and R. Kannan. Optimized broadcast protocol for sensor networks; T-C Aug 20051013-1024

Dutt, N.D., see Biswas, P., T-C Oct 20051216-1226

E

Efstathiou, C., H.T. Vergos, G. Dimitrakopoulos, and D. Nikolos. Efficient diminished-1 modulo 2n + 1 multipliers; T-C Apr 05491-496

Engblom, J., see Ermedahl, A., T-C Sep 051104-1122

Ercegovac, M.D., see Zhijun Huang, T-C Mar 05272-283

Erl-Huei Lu, see Chiou-Yng Lee, T-C Sep 051061-1070

Ermedahl, A., F. Stappert, and J. Engblom. Clustered worst-case execution-time calculation; T-C Sep 051104-1122

Espasa, R., see Seznec, A., T-C Jul 05913-916

F

Fan Haining, see Haining Fan, T-C Apr 05485-490

Fan Jianxi, see Jianxi Fan, T-C Feb 2005176-184

Fan Pingzhi, see Qingchun Chen, T-C Sep 051182-1183

Feng, G.-L., R.H. Deng, F. Bao, and J.-C. Shen. New efficient MDS array codes for RAID. Part I. Reed-Solomon-like codes for tolerating three disk failures; T-C Sep 051071-1080

Feng, G.-L., R.H. Deng, F. Bao, and J.-C. Shen. New efficient MDS array codes for RAID Part II: Rabin-like codes for tolerating multiple (greater than or equal to 4) disk failures; T-C Dec 20051473-1483

Finchelstein, D.F., see Calhoun, B.H., T-C Jun 05727-740

Franklin, M., see Aggarwal, A., T-C Dec 20051496-1507

Fujiwara, E., see Umanesan, G., T-C Jan 200587-92

G

Ganusov, I., see Burtscher, M., T-C Nov 20051329-1344

Gao Lan, see Jun Yang, T-C May 05630-640

Gaudiot, J.-L., see Burns, J., T-C Feb 2005141-152

Gedik, B., and L. Liu. A scalable peer-to-peer architecture for distributed information monitoring applications; T-C Jun 05767-782

Ghez, C., see Kulkarni, C., T-C Jan 200576-81

Gibert, E., J. Sanchez, and A. Gonzalez. Distributed data cache designs for clustered VLIW processors; T-C Oct 20051227-1241

Gizopoulos, D., see Kranitis, N., T-C Apr 05461-475

Gonzalez, A., see Gibert, E., T-C Oct 20051227-1241

Gordon-Ross, A., and F. Vahid. Frequent loop detection using efficient nonintrusive on-chip hardware; T-C Oct 20051203-1215

Granger, R., D. Page, and M. Stam. Hardware and software normal basis arithmetic for pairing-based cryptography in characteristic three; T-C Jul 05852-860

Grecu, C., see Partha Pratim Pande, T-C Aug 20051025-1040

Guha, R.K., see Rakshit, S., T-C Nov 20051384-1393

Gulliver, T.A., see Khabbazian, M., T-C Nov 20051454-1459

Gupta Rajesh, see D'Alberto, P., T-C Feb 2005185-197

Guthaus, M.R., see Ravindran, R.A., T-C Aug 2005998-1012

H

Hadjicostis, C.N. Aliasing probability calculations for arbitrary compaction under independently selected random test vectors; T-C Dec 20051614-1627

Haibin Lu, K.S. Kim, and S. Sahni. Prefix and interval-partitioned dynamic IP router-tables; T-C May 05545-557

Haining Fan, and Yiqi Dai. Fast bit-parallel GF(2n) multiplier for all trinomials; T-C Apr 05485-490

Haisang Wu, B. Ravindran, E.D. Jensen, and Peng Li. Time/utility function decomposition techniques for utility accrual scheduling algorithms in real-time distributed systems; T-C Sep 051138-1153

Hariyama, M., T. Aoyama, and M. Kameyama. Genetic approach to minimizing energy consumption of VLSI processors using multiple supply voltages; T-C Jun 05642-650

Harris, I.G., see Heath, M.W., T-C Dec 20051532-1546

Hasan, M.A., see Reyhani-Masoleh, A., T-C Feb 200598-110

Hasan, M.A., see Daneshbeh, A.K., T-C Mar 05370-380

Hashempour, H., and F. Lombardi. Application of arithmetic coding to compression of VLSI test data; T-C Sep 051166-1177

Hawkins, D.M., see Yi, J.J., T-C Nov 20051360-1373

Heath, M.W., W.P. Burleson, and I.G. Harris. Synchro-tokens: A deterministic GALS methodology for chip-level debug and test; T-C Dec 20051532-1546

Hong, D., see Chang, K.-Y., T-C Dec 20051628-1630

Horng Jenn-Shyong, see Chiou-Yng Lee, T-C Sep 051061-1070

Hsu Lih-Hsing, see Pao-Lien Lai, T-C Feb 2005165-175

Huang, C., and T. Abdelzaher. Bounded-latency content distribution: Feasibility and evaluation; T-C Nov 20051422-1437

Huang Zhijun, see Zhijun Huang, T-C Mar 05272-283

Hwu, W.-M.W., and K.V. Palem. Guest editors' introduction [tribute to B. Ramakrishna]; T-C Oct 20051185-1187

Hyogon Kim, Jin-Ho Kim, Inhye Kang, and Saewoong Bahk. Preventing session table explosion in packet inspection computers; T-C Feb 2005238-240

I

I-Chang Jou, see Chiou-Yng Lee, T-C Sep 051061-1070

Inhye Kang, see Hyogon Kim, T-C Feb 2005238-240

Irwin, M.J., see Kim, E.J., T-C Jun 05660-671

Ivanov, A., see Partha Pratim Pande, T-C Aug 20051025-1040

Iyengar, S.S., see Durresi, A., T-C Aug 20051013-1024

J

Jackson, S.J., see Burtscher, M., T-C Nov 20051329-1344

Jaejin Lee, see Kharbutli, M., T-C May 05573-586

Jayapala, M., F. Barat, T. Vander Aa, F. Catthoor, H. Corporaal, and G. Deconinck. Clustered loop buffer organization for low energy VLIW embedded processors; T-C Jun 05672-683

Jenn-Shyong Horng, see Chiou-Yng Lee, T-C Sep 051061-1070

Jensen, E.D., see Haisang Wu, T-C Sep 051138-1153

Jiang, Q., see Yang, J., T-C May 05616-629

Jiang, S., and X. Zhang. Making LRU friendly to weak locality workloads: a novel replacement algorithm to improve buffer cache performance; T-C Aug 2005939-952

Jianxi Fan, and Xiaola Lin. The t/k-diagnosability of the BC graphs; T-C Feb 2005176-184

Jin-Ho Kim, see Hyogon Kim, T-C Feb 2005238-240

Jiwu Shu, Bigang Li, and Weimin Zheng. Design and implementation of an SAN system based on the fiber channel protocol; T-C Apr 05439-448

John, L.K., see Lee, B.K., T-C Jul 05917-922

Jones, M., see Partha Pratim Pande, T-C Aug 20051025-1040

Jou I-Chang, see Chiou-Yng Lee, T-C Sep 051061-1070

Jullien, G.A., see Muscedere, R., T-C Mar 05257-271

Jun Yang, Lan Gao, and Youtao Zhang. Improving memory encryption performance in secure processors; T-C May 05630-640

K

Kaihara, M.E., and N. Takagi. A hardware algorithm for modular multiplication/division; T-C Jan 200512-21

Kameyama, M., see Hariyama, M., T-C Jun 05642-650

Kam-Yiu Lam, see Qingchun Chen, T-C Sep 051182-1183

Kanaujia, S., see Welch, B., T-C Oct 20051188-1202

Kandemir, M., see Kim, E.J., T-C Jun 05660-671

Kang Inhye, see Hyogon Kim, T-C Feb 2005238-240

Kannan, R., see Durresi, A., T-C Aug 20051013-1024

Kannan Rajgopal, see Rajgopal Kannan, T-C May 05534-544

Kaps, J.-P., K. Yuksel, and B. Sunar. Energy scalable universal hashing; T-C Dec 20051484-1495

Katti, R.S., see Ruan, X., T-C Feb 2005124-131

Kaushik Roy, see Swarup Bhunia, T-C Jun 05752-766

Ke, J., see Burtscher, M., T-C Nov 20051329-1344

Kenney, R.D., and M.J. Schulte. High-speed multioperand decimal adders; T-C Aug 2005953-963

Ke Yi, see Anastasiadis, S.V., T-C Apr 05398-408

Khabbazian, M., T.A. Gulliver, and V.K. Bhargava. A new minimal average weight represent. for left-to-right point multipl. methods; T-C Nov 20051454-1459

Kharbutli, M., Y. Solihin, and Jaejin Lee. Eliminating conflict misses using prime number-based cache indexing; T-C May 05573-586

Kim, E.J., G.M. Link, K.H. Yum, N. Vijaykrishnan, M. Kandemir, M.J. Irwin, and C.R. Das. A holistic approach to designing energy-efficient cluster interconnects; T-C Jun 05660-671

Kim, H., see Mutlu, O., T-C Dec 20051556-1571

Kim, H.-y., S. Rixner, and V.S. Pai. Network interface data caching; T-C Nov 20051394-1408

Kim, K., J.L. Diaz, L. Lo Bello, J.M. Lopez, C.-G. Lee, and S.L. Min. An exact stochastic analysis of priority-driven periodic real-time systems and its approximations; T-C Nov 20051460-1466

Kim, K.S., see Haibin Lu, T-C May 05545-557

Kim Hyogon, see Hyogon Kim, T-C Feb 2005238-240

Kim Jin-Ho, see Hyogon Kim, T-C Feb 2005238-240

Kim Suhwan, see Suhwan Kim, T-C Jun 05651-659

Kornerup, P. Digit selection for SRT division and square root; T-C Mar 05294-303

Kornerup, P., see Brisebarre, N., T-C Mar 05331-339

Kranitis, N., A. Paschalis, D. Gizopoulos, and G. Xenoulis. Software-based self-testing of embedded processors; T-C Apr 05461-475

Krogh, B.H., see Ren, Z., T-C Apr 05409-420

Kshemkalyani, A.J., see Chandra, P., T-C Nov 20051438-1453

Kulkarni, C., C. Ghez, M. Miranda, F. Catthoor, and H. De Man. Cache conscious data layout organization for conflict miss reduction in embedded multimedia applications; T-C Jan 200576-81

Kuo Chin-Fu, see Tei-Wei Kuo, T-C Jan 200547-60

Kuo Tei-Wei, see Tei-Wei Kuo, T-C Jan 200547-60

L

Lageweg, C., see Cotofana, S., T-C Mar 05243-256

Lai Pao-Lien, see Pao-Lien Lai, T-C Feb 2005165-175

Lam Kam-Yiu, see Qingchun Chen, T-C Sep 051182-1183

Lang, T., and E. Antelo. High-throughput CORDIC-based geometry operations for 3D computer graphics; T-C Mar 05347-361

Lang, T., see Antelo, E., T-C Jul 05837-851

Lan Gao, see Jun Yang, T-C May 05630-640

Larriba-Pey, J.L., see Ramirez, A., T-C Jan 200522-35

Laxmi Narayan Bhuyan, see Ravikumar, V.C., T-C May 05521-533

Lee, B.K., and L.K. John. Implications of executing compression and encryption applications on general purpose processors; T-C Jul 05917-922

Lee, C.-G., see Kim, K., T-C Nov 20051460-1466

Lee, D., A. Abdul Gaffar, O. Mencer, and W. Luk. Optimizing hardware function evaluation; T-C Dec 20051520-1531

Lee Chiou-Yng, see Chiou-Yng Lee, T-C Sep 051061-1070

Lee Jaejin, see Kharbutli, M., T-C May 05573-586

Lefevre, V., see Stehle, D., T-C Mar 05340-346

Li, J.C.-M Diagnosis of multiple hold-time and setup-time faults in scan chains; T-C Nov 20051467-1472

Li Bigang, see Jiwu Shu, T-C Apr 05439-448

Lih-Hsing Hsu, see Pao-Lien Lai, T-C Feb 2005165-175

Lilja, D.J., see Yi, J.J., T-C Nov 20051360-1373

Link, G.M., see Kim, E.J., T-C Jun 05660-671

Lin Xiaola, see Jianxi Fan, T-C Feb 2005176-184

Li Peng, see Haisang Wu, T-C Sep 051138-1153

Liu, L., see Gedik, B., T-C Jun 05767-782

Liu Yunhao, see Xiao, L., T-C Sep 051091-1103

Lo Bello, L., see Kim, K., T-C Nov 20051460-1466

Lombardi, F., see Hashempour, H., T-C Sep 051166-1177

Lopez, J.M., see Kim, K., T-C Nov 20051460-1466

Lu, H. A novel high-order tree for secure multicast key management; T-C Feb 2005214-224

Lu, H., and Sartaj Sahni. A B-tree dynamic router-table design; T-C Jul 05813-824

Lu Erl-Huei, see Chiou-Yng Lee, T-C Sep 051061-1070

Lu Haibin, see Haibin Lu, T-C May 05545-557

Luk, W., see Lee, D., T-C Dec 20051520-1531

M

Mahapatra, R.N., see Ravikumar, V.C., T-C May 05521-533

Mahlke, S.A., see Ravindran, R.A., T-C Aug 2005998-1012

Mahlke, S.A., see Clark, N.T., T-C Oct 20051258-1270

Mandyam, G.D., see Chatterjee, M., T-C Dec 20051584-1597

Manivannan, D., see Yang, J., T-C May 05616-629

Marculescu, R., see Ren, Z., T-C Apr 05409-420

Marsman, E.D., see Ravindran, R.A., T-C Aug 2005998-1012

Martinelli, A., see Teslenko, M., T-C Feb 2005236-237

Matsuura, M., see Butler, J.T., T-C Sep 051041-1053

Matula, D.W., see Seidel, P.-M., T-C Feb 2005111-123

McFearin, L.D., see Seidel, P.-M., T-C Feb 2005111-123

Mencer, O., see Lee, D., T-C Dec 20051520-1531

Metra, C., see Omana, M., T-C Feb 2005153-164

Meyer, B.H., J.J. Pieper, J.M. Paul, J.E. Nelson, S.M. Pieper, and A.G. Rowe. Power-performance simulation and design strategies for single-chip heterogeneous multiprocessors; T-C Jun 05684-697

Miller, W.C., see Muscedere, R., T-C Mar 05257-271

Min, S.L., see Kim, K., T-C Nov 20051460-1466

Miranda, M., see Kulkarni, C., T-C Jan 200576-81

Montgomery, P.L. Five, six, and seven-term Karatsuba-like formulae; T-C Mar 05362-369

Montuschi, P., see Antelo, E., T-C Jul 05837-851

Mudge, T. Introduction to the special section on energy efficient computing; T-C Jun 05641

Mukesh Singhal, see Yang, J., T-C May 05616-629

Mukherjee Amar, see Tao, T., T-C Aug 2005929-938

Muller, J.-M., see Pineiro, J.-A., T-C Mar 05304-318

Muller, J.-M., see Brisebarre, N., T-C Mar 05331-339

Murphy, J., see Sokolov, D., T-C Apr 05449-460

Muscedere, R., V. Dimitrov, G.A. Jullien, and W.C. Miller. Efficient techniques for binary-to-multidigit multidimensional logarithmic number system conversion using range-addressable look-up tables; T-C Mar 05257-271

Mutlu, O., H. Kim, D.N. Armstrong, and Y.N. Patt. An analysis of the performance impact of wrong-path memory references on out-of-order and runahead execution processors; T-C Dec 20051556-1571

N

Nannarelli, A., see Antelo, E., T-C Jul 05837-851

Narayan Bhuyan Laxmi, see Ravikumar, V.C., T-C May 05521-533

Natchev, N., see Avresky, D., T-C May 05603-615

Naveen Verma, see Calhoun, B.H., T-C Jun 05727-740

Nelson, J.E., see Meyer, B.H., T-C Jun 05684-697

Nguyen, G.D. Error-detection codes: algorithms and fast implementation; T-C Jan 20051-11

Ni, L.M., see Xiao, L., T-C Sep 051091-1103

Nicolau, A., see D'Alberto, P., T-C Feb 2005185-197

Nikolos, D., see Dimitrakopoulos, G., T-C Feb 2005225-231

Nikolos, D., see Efstathiou, C., T-C Apr 05491-496

Nilanjan Banerjee, see Swarup Bhunia, T-C Jun 05752-766

Nourani, M., see Chin, J., T-C Dec 20051598-1613

Nunez-Yanez, J.L., and V.A. Chouliaras. A configurable statistical lossless compression cored based on variable order Markov modeling and arithmetic coding; T-C Nov 20051345-1359

O

Oberman, S.F., see Pineiro, J.-A., T-C Mar 05304-318

Omana, M., D. Rossi, and C. Metra. Low cost and high speed embedded two-rail code checker; T-C Feb 2005153-164

Orailoglu, A., see Bayraktaroglu, I., T-C Jan 200561-75

P

Paar, C., see Wollinger, T., T-C Jul 05861-872

Page, D., see Granger, R., T-C Jul 05852-860

Pai, V.S., see Kim, H.-y., T-C Nov 20051394-1408

Palem, K.V. Energy aware computing through probabilistic switching: a study of limits; T-C Sep 051123-1137

Palem, K.V., see Hwu, W.-M.W., T-C Oct 20051185-1187

Palis, M.A. The granularity metric for fine-grain real-time scheduling; T-C Dec 20051572-1583

Pan, D., and Y. Yang. FIFO-based multicast scheduling algorithm for virtual output queued packet switches; T-C Oct 20051283-1297

Pande Partha Pratim, see Partha Pratim Pande, T-C Aug 20051025-1040

Pao-Lien Lai, J.J.M. Tan, Chien-Ping Chang, and Lih-Hsing Hsu. Conditional diagnosability measures for large multiprocessor systems; T-C Feb 2005165-175

Papaefthymiou, M.C., see Suhwan Kim, T-C Jun 05651-659

Park, J., and S. Sahni. Maximum lifetime broadcasting in wireless networks; T-C Sep 051081-1090

Partha Pratim Pande, C. Grecu, M. Jones, A. Ivanov, and R. Saleh. Performance evaluation and design trade-offs for network-on-chip interconnect architectures; T-C Aug 20051025-1040

Paruchuri, V.K., see Durresi, A., T-C Aug 20051013-1024

Paschalis, A., see Kranitis, N., T-C Apr 05461-475

Patt, Y.N., see Mutlu, O., T-C Dec 20051556-1571

Paul, J.M., see Meyer, B.H., T-C Jun 05684-697

Pelzl, J., see Wollinger, T., T-C Jul 05861-872

Peng Li, see Haisang Wu, T-C Sep 051138-1153

Petrenko, A., and N. Yevtushenko. Testing from partial deterministic FSM specifications; T-C Sep 051154-1165

Pieper, J.J., see Meyer, B.H., T-C Jun 05684-697

Pieper, S.M., see Meyer, B.H., T-C Jun 05684-697

Pineiro, J.-A., S.F. Oberman, J.-M. Muller, and J.D. Bruguera. High-speed function approximation using a minimax quadratic interpolator; T-C Mar 05304-318

Pingzhi Fan, see Qingchun Chen, T-C Sep 051182-1183

Pinotti, M.C., see Ardizzoni, E., T-C May 05558-572

Pratim Pande Partha, see Partha Pratim Pande, T-C Aug 20051025-1040

Prith Banerjee, see Sanghamitra Roy, T-C Jul 05886-896

Q

Qingchun Chen, Kam-Yiu Lam, and Pingzhi Fan. Comments on "Distributed Bayesian algorithms for fault-tolerant event region detection in wireless sensor networks"; T-C Sep 051182-1183

R

Rajesh Gupta, see D'Alberto, P., T-C Feb 2005185-197

Rajgopal Kannan. The KR-Benes network: a control-optimal rearrangeable permutation network; T-C May 05534-544

Rakshit, S., and R.K. Guha. Fair bandwidth sharing in distributed systems: A game-theoretic approach; T-C Nov 20051384-1393

Ramaprasad, S., see Ardizzoni, E., T-C May 05558-572

Ramirez, A., J.L. Larriba-Pey, and M. Valero. Software Trace Cache; T-C Jan 200522-35

Rangaswami, R., see Dimitrijevic, Z., T-C Oct 20051314-1326

Ratanaworabhan, P., see Burtscher, M., T-C Nov 20051329-1344

Ravikumar, V.C., R.N. Mahapatra, and Laxmi Narayan Bhuyan. EaseCAM: an energy and storage efficient TCAM-based router architecture for IP lookup; T-C May 05521-533

Ravindran, B., see Haisang Wu, T-C Sep 051138-1153

Ravindran, R.A., R.M. Senger, E.D. Marsman, G.S. Dasika, M.R. Guthaus, S.A. Mahlke, and R.B. Brown. Partitioning variables across register windows to reduce spill code in a low-power processor; T-C Aug 2005998-1012

Reese, R.B., M.A. Thornton, and C. Traver. A coarse-grain phased logic CPU; T-C Jul 05788-799

Ren, Z., B.H. Krogh, and R. Marculescu. Hierarchical adaptive dynamic power management; T-C Apr 05409-420

Revol, N., see Brisebarre, N., T-C Mar 05331-339

Reyhani-Masoleh, A., and A. Hasan. Low complexity word-level sequential normal basis multipliers; T-C Feb 200598-110

Rixner, S., see Kim, H.-y., T-C Nov 20051394-1408

Rizzi, R., see Ardizzoni, E., T-C May 05558-572

Rosenberg, A.L., and M. Yurkewych. Guidelines for scheduling some common computation-dags for Internet-based computing; T-C Apr 05428-438

Rossi, D., see Omana, M., T-C Feb 2005153-164

Rowe, A.G., see Meyer, B.H., T-C Jun 05684-697

Roy Kaushik, see Swarup Bhunia, T-C Jun 05752-766

Roy Sanghamitra, see Sanghamitra Roy, T-C Jul 05886-896

Ruan, X., and R.S. Katti. Left-to-right optimal signed-binary representation of a pair of integers; T-C Feb 2005124-131

S

Sabbineni, H., and K. Chakrabarty. Location-aided flooding: an energy-efficient data dissemination protocol for wireless-sensor networks; T-C Jan 200536-46

Saewoong Bahk, see Hyogon Kim, T-C Feb 2005238-240

Sahni, S., see Haibin Lu, T-C May 05545-557

Sahni, S., see Park, J., T-C Sep 051081-1090

Sahni Sartaj, see Lu, H., T-C Jul 05813-824

Saleh, R., see Partha Pratim Pande, T-C Aug 20051025-1040

Sam, N.B., see Burtscher, M., T-C Nov 20051329-1344

Sanchez, J., see Gibert, E., T-C Oct 20051227-1241

Sanghamitra Roy, and Prith Banerjee. An algorithm for trading off quantization error with hardware resources for MATLAB-based FPGA design; T-C Jul 05886-896

Sartaj Sahni, see Lu, H., T-C Jul 05813-824

Sasao, T., see Butler, J.T., T-C Sep 051041-1053

Sassone, P.G., and D.S. Wills. Scaling up the Atlas chip-multiprocessor; T-C Jan 200582-87

Satran, J., D. Sheinwald, and I. Shimony. Out of order incremental CRC computation; T-C Sep 051178-1181

Savas, E. A carry-free architecture for Montgomery inversion; T-C Dec 20051508-1519

Schmookler, M., see Schwarz, E.M., T-C Jul 05825-836

Schreiber, R., see Darte, A., T-C Oct 20051242-1257

Schulte, M.J., and J.-C. Bajard. Guest editors' introduction: Special issue on computer arithmetic; T-C Mar 05241-242

Schulte, M.J., see Kenney, R.D., T-C Aug 2005953-963

Schwarz, E.M., M. Schmookler, and S.D. Trong. FPU implementations with denormalized numbers; T-C Jul 05825-836

Seetharam, A., see Welch, B., T-C Oct 20051188-1202

Seidel, P.-M., L.D. McFearin, and D.W. Matula. Secondary radix recodings for higher radix multipliers; T-C Feb 2005111-123

Senger, R.M., see Ravindran, R.A., T-C Aug 2005998-1012

Seong-Hwan Cho, see Calhoun, B.H., T-C Jun 05727-740

Seznec, A., and R. Espasa. Conflict-free accesses to strided vectors on a banked cache; T-C Jul 05913-916

Shashanka, M.V.S., see Ardizzoni, E., T-C May 05558-572

Sheinwald, D., see Satran, J., T-C Sep 051178-1181

Shen, J.-C., see Feng, G.-L., T-C Sep 051071-1080

Shen, J.-C., see Feng, G.-L., T-C Dec 20051473-1483

Shimony, I., see Satran, J., T-C Sep 051178-1181

Shu Jiwu, see Jiwu Shu, T-C Apr 05439-448

Singhal Mukesh, see Yang, J., T-C May 05616-629

Sokolov, D., J. Murphy, A. Bystrov, and A. Yakovlev. Design and analysis of dual-rail circuits for security applications; T-C Apr 05449-460

Solihin, Y., see Kharbutli, M., T-C May 05573-586

Stam, M., see Granger, R., T-C Jul 05852-860

Stappert, F., see Ermedahl, A., T-C Sep 051104-1122

Stehle, D., V. Lefevre, and P. Zimmermann. Searching worst cases of a one-variable function using lattice reduction; T-C Mar 05340-346

Suhwan Kim, C.H. Ziesler, and M.C. Papaefthymiou. Charge-recovery computing on silicon; T-C Jun 05651-659

Sun, X., and Y.Q. Zhao. An on-chip IP address lookup algorithm; T-C Jul 05873-885

Sunar, B. An efficient basis conversion algorithm for composite fields with given representations; T-C Aug 2005992-997

Sunar, B., see Kaps, J.-P., T-C Dec 20051484-1495

Swarup Bhunia, Animesh Datta, Nilanjan Banerjee, and Kaushik Roy. GAARP: a power-aware GALS architecture for real-time algorithm-specific tasks; T-C Jun 05752-766

T

Takagi, N., see Kaihara, M.E., T-C Jan 200512-21

Tallini, L.G. Bounds on the capacity of the unidirectional channels; T-C Feb 2005232-235

Tan, D., see Danysh, A., T-C Mar 05284-293

Tan, J.J.M., see Pao-Lien Lai, T-C Feb 2005165-175

Tao, T., and Amar Mukherjee. Pattern matching in LZW compressed files; T-C Aug 2005929-938

Teahan, W., see Abel, J., T-C May 05497-507

Tei-Wei Kuo, Yung-Sheng Chao, Chin-Fu Kuo, and Cheng Chang. Real-time dwell scheduling of component-oriented phased array radars; T-C Jan 200547-60

Teslenko, M., A. Martinelli, and E. Dubrova. Bound-set preserving ROBDD variable orderings may not be optimum; T-C Feb 2005236-237

Thirumalai, D., see Welch, B., T-C Oct 20051188-1202

Thomas, D.C., see Caccamo, M., T-C Feb 2005198-213

Thomas, D.C., see Caccamo, M., T-C Jun 05783

Thornton, M.A., see Reese, R.B., T-C Jul 05788-799

Tisserand, A., see de Dinechin, F., T-C Mar 05319-330

Tisserand, A., see Boullis, N. , T-C Oct 20051271-1282

Traver, C., see Reese, R.B., T-C Jul 05788-799

Trong, S.D., see Schwarz, E.M., T-C Jul 05825-836

Tseng, J.H., and K. Asanovic. A speculative control scheme for an energy-efficient banked register file; T-C Jun 05741-751

Tyson, G.S., see Cheng, A.C., T-C Jun 05698-713

U

Uht, A.K. Uniprocessor performance enhancement through adaptive clock frequency control; T-C Feb 2005132-140

Umanesan, G., and E. Fujiwara. Parallel decoding cyclic burst error correcting codes; T-C Jan 200587-92

V

Vahid, F., see Gordon-Ross, A., T-C Oct 20051203-1215

Valero, M., see Ramirez, A., T-C Jan 200522-35

Valero, M., see Alvarez, C., T-C Jul 05922-927

Vander Aa, T., see Jayapala, M., T-C Jun 05672-683

Vandierendonck, H., and K. De Bosschere. XOR-based hash functions; T-C Jul 05800-812

Varman, P., see Anastasiadis, S.V., T-C Apr 05398-408

Vassiliadis, S., see Cotofana, S., T-C Mar 05243-256

Veidenbaum, A., see D'Alberto, P., T-C Feb 2005185-197

Vergos, H.T., see Efstathiou, C., T-C Apr 05491-496

Verma Naveen, see Calhoun, B.H., T-C Jun 05727-740

Vijaykrishnan, N., see Kim, E.J., T-C Jun 05660-671

Vijaykrishnan, N., see Yang, S., T-C Jun 05714-726

Villard, G., see Darte, A., T-C Oct 20051242-1257

Vitter, J.S., see Anastasiadis, S.V., T-C Apr 05398-408

Volkmer, M., and S. Wallner. Tree parity machine rekeying architectures; T-C Apr 05421-427

Voyiatzis, I. Test vector embedding into accumulator-generated sequences: a linear-time solution; T-C Apr 05476-484

W

Wallner, S., see Volkmer, M., T-C Apr 05421-427

Wang, A., see Calhoun, B.H., T-C Jun 05727-740

Wei, J., X. Zhou, and C.-Z. Xu. Robust processing rate allocation for proportional slowdown differentiation on Internet servers; T-C Aug 2005964-977

Weimin Zheng, see Jiwu Shu, T-C Apr 05439-448

Welch, B., S. Kanaujia, A. Seetharam, D. Thirumalai, and A.G. Dean. Supporting demanding hard-real-time systems with STI; T-C Oct 20051188-1202

Wentzloff, D.D., see Calhoun, B.H., T-C Jun 05727-740

Wills, D.S., see Sassone, P.G., T-C Jan 200582-87

Wolf, W., see Yang, S., T-C Jun 05714-726

Wollinger, T., J. Pelzl, and C. Paar. Cantor versus Harley: optimization and analysis of explicit formulae for hyperelliptic curve cryptosystems; T-C Jul 05861-872

Wu Haisang, see Haisang Wu, T-C Sep 051138-1153

X

Xenoulis, G., see Kranitis, N., T-C Apr 05461-475

Xiao, L., Yunhao Liu, and L.M. Ni. Improving unstructured peer-to-peer systems by adaptive connection establishment; T-C Sep 051091-1103

Xiaola Lin, see Jianxi Fan, T-C Feb 2005176-184

Xu, C.-Z., see Wei, J., T-C Aug 2005964-977

Y

Yakovlev, A., see Sokolov, D., T-C Apr 05449-460

Yang, J., Q. Jiang, D. Manivannan, and Mukesh Singhal. A fault-tolerant distributed channel allocation scheme for cellular networks; T-C May 05616-629

Yang, S., W. Wolf, and N. Vijaykrishnan. Power and performance analysis of motion estimation based on hardware and software realizations; T-C Jun 05714-726

Yang, Y., see Pan, D., T-C Oct 20051283-1297

Yang Jun, see Jun Yang, T-C May 05630-640

Yevtushenko, N., see Petrenko, A., T-C Sep 051154-1165

Yi, J.J., D.J. Lilja, and D.M. Hawkins. Improving computer architecture simulation methodology by adding statistical rigor; T-C Nov 20051360-1373

Yi Ke, see Anastasiadis, S.V., T-C Apr 05398-408

Yiqi Dai, see Haining Fan, T-C Apr 05485-490

Yi Zou, and K. Chakrabarty. A distributed coverage- and connectivity-centric technique for selecting active nodes in wireless sensor networks; T-C Aug 2005978-991

Youtao Zhang, see Jun Yang, T-C May 05630-640

Yuksel, K., see Kaps, J.-P., T-C Dec 20051484-1495

Yum, K.H., see Kim, E.J., T-C Jun 05660-671

Yung-Sheng Chao, see Tei-Wei Kuo, T-C Jan 200547-60

Yunhao Liu, see Xiao, L., T-C Sep 051091-1103

Yurkewych, M., see Rosenberg, A.L., T-C Apr 05428-438

Z

Zhang, W. Replication cache: A small fully associative cache to improve data cache reliability; T-C Dec 20051547-1555

Zhang, X., see Jiang, S., T-C Aug 2005939-952

Zhang Youtao, see Jun Yang, T-C May 05630-640

Zhao, Y.Q., see Sun, X., T-C Jul 05873-885

Zheng Weimin, see Jiwu Shu, T-C Apr 05439-448

Zhijun Huang, and M.D. Ercegovac. High-performance low-power left-to-right array multiplier design; T-C Mar 05272-283

Zhong, H., see Clark, N.T., T-C Oct 20051258-1270

Zhou, H., and T.M. Conte. Enhancing memory-level parallelism via recovery-free value prediction; T-C Jul 05897-912

Zhou, X., see Wei, J., T-C Aug 2005964-977

Zhou, Y., see Zhu, Q., T-C May 05587-602

Zhu, Q., and Y. Zhou. Power-aware storage cache management; T-C May 05587-602

Ziesler, C.H., see Suhwan Kim, T-C Jun 05651-659

Zimmermann, P., see Stehle, D., T-C Mar 05340-346

Zou Yi, see Yi Zou, T-C Aug 2005978-991

SUBJECT INDEX

3G
3G mobile communications

joint reliability of medium access control and radio link protocol in 3G CDMA systems. Chatterjee, M., + , T-C Dec 20051584-1597

A
Access protocols

joint reliability of medium access control and radio link protocol in 3G CDMA systems. Chatterjee, M., + , T-C Dec 20051584-1597

Access protocols;
see Code division multiple access
Adders

arith. operations via controlled transport of charge, addit. Cotofana, S., + , T-C Mar 05243-256

higher radix multipliers, secondary radix recodings. Seidel, P.-M., + , T-C Feb 2005111-123

high-perform. low-power left-to-right array multiplier design. Zhijun Huang, + , T-C Mar 05272-283

high-speed multioperand decimal adders. Kenney, R.D., + , T-C Aug 2005953-963

high-speed parallel-prefix VLSI Ling adders. Dimitrakopoulos, G., + , T-C Feb 2005225-231

vector/SIMD multiply-accumulate unit, archit. and implement. Danysh, A., + , T-C Mar 05284-293

Ad hoc networks

causality-based predicate detection across space and time. Chandra, P., + , T-C Nov 20051438-1453

Aircraft;
see Military aircraft
Algebra;
see Galois fields; Polynomials
Algorithm theory;
see Computational complexity
Analog-digital conversion

arith. operations via controlled transport of charge, addit. Cotofana, S., + , T-C Mar 05243-256

Application specific integrated circuits

tree parity machine rekeying archits. Volkmer, M., + , T-C Apr 05421-427

Application specific integrated circuits;
see System-on-chip
Approximation methods

1-variable fn., lattice reduction, searching worst cases. Stehle, D., + , T-C Mar 05340-346

Arithmetic

computer arithmetic (special issue). T-C Mar 05241-380

computer arithmetic (special issue intro.). Schulte, M.J., + , T-C Mar 05241-242

optimiz. of hardware multiplication by constant matrices. Boullis, N. , + , T-C Oct 20051271-1282

Arithmetic;
see Digital arithmetic
Arithmetic codes

coding, compress. of VLSI test data. Hashempour, H., + , T-C Sep 051166-1177

low complexity bit-parallel multipliers. Chang, K.-Y., + , T-C Dec 20051628-1630

Arrays;
see Phased array radar
Associative memories

EaseCAM, energy and storage efficient TCAM-based router archit. for IP lookup. Ravikumar, V.C., + , T-C May 05521-533

eliminating conflict misses, prime no.-based cache indexing. Kharbutli, M., + , T-C May 05573-586

Asynchronous logic circuits

coarse-grain phased logic CPU. Reese, R.B., + , T-C Jul 05788-799

Authorization

energy scalable universal hashing. Kaps, J.-P., + , T-C Dec 20051484-1495

Automata

partial deterministic FSM specs., testing. Petrenko, A., + , T-C Sep 051154-1165

Automatic test equipment

arith. coding, compress. of VLSI test data. Hashempour, H., + , T-C Sep 051166-1177

integrated ILP-based test scheduling environment. Chin, J., + , T-C Dec 20051598-1613

Automatic testing

low cost and high speed embedded 2-rail code checker. Omana, M., + , T-C Feb 2005153-164

B
Bandwidth allocation

correction to "Efficient reclaiming in reservation-based real-time systems with variable execution times" (Feb 05 198-213). Caccamo, M., + , T-C Jun 05783

fair bandwidth sharing in distributed systems. Rakshit, S., + , T-C Nov 20051384-1393

Bayes procedures

fault-tolerant event region detect., wireless sens. nets., distrib. Bayesian algms. Qingchun Chen, + , T-C Sep 051182-1183

Block codes

error-detect. codes, algms. and fast implement. Nguyen, G.D., T-C Jan 20051-11

Boolean algebra;
see Boolean functions
Boolean functions

bound-set preserving ROBDD variable orderings, not, optimum. Teslenko, M., + , T-C Feb 2005236-237

Boundary scan testing

optimal deterministic partitionings, scan-based BIST fault diagnosis, constr. Bayraktaroglu, I., + , T-C Jan 200561-75

Broadcasting

sens. nets., optimized broadcast protocol. Durresi, A., + , T-C Aug 20051013-1024

wireless nets., max. lifetime broadcasting. Park, J., + , T-C Sep 051081-1090

Buffer memories

low energy VLIW embedded processors, clustered loop buffer organization. Jayapala, M., + , T-C Jun 05672-683

Buffer storage

replication cache, small fully associative cache to improve data cache reliability. Zhang, W., T-C Dec 20051547-1555

Buffer storage;
see Cache storage
C
Cache memories

conflict miss reduction, embedded multimedia appls., cache conscious data layout organization. Kulkarni, C., + , T-C Jan 200576-81

eliminating conflict misses, prime no.-based cache indexing. Kharbutli, M., + , T-C May 05573-586

parameterized loop nests for direct mapped data cache, line size adaptivity anal. D'Alberto, P., + , T-C Feb 2005185-197

power-aware storage cache mgt. Zhu, Q., + , T-C May 05587-602

software Trace Cache. Ramirez, A., + , T-C Jan 200522-35

strided vectors, banked cache, conflict-free accesses. Seznec, A., + , T-C Jul 05913-916

weak locality workloads, making LRU friendly. Jiang, S., + , T-C Aug 2005939-952

XOR-based hash fns. Vandierendonck, H., + , T-C Jul 05800-812

Cache storage

distributed data cache designs for clustered VLIW processors. Gibert, E., + , T-C Oct 20051227-1241

lattice-based memory allocation. Darte, A., + , T-C Oct 20051242-1257

network interface data caching. Kim, H.-y., + , T-C Nov 20051394-1408

replication cache, small fully associative cache to improve data cache reliability. Zhang, W., T-C Dec 20051547-1555

Calculus;
see Integration
Cellular arrays;
see Systolic arrays
Circuit analysis computing;
see Circuit simulation
Circuit layout;
see Integrated circuit layout
Circuit simulation

dual-rail ccts. for security appls., design and anal. Sokolov, D., + , T-C Apr 05449-460

Circuit testing

test vector embedding, accumulator-generated seqs. Voyiatzis, I., T-C Apr 05476-484

Circuit testing;
see Integrated circuit testing
Client-server systems

aggregate streaming data, optimal lexicographic shaping. Anastasiadis, S.V., + , T-C Apr 05398-408

Clocks

modular multiplication/division, hardware algm. Kaihara, M.E., + , T-C Jan 200512-21

SMT/CMP throughput, area and syst. clock effects. Burns, J., + , T-C Feb 2005141-152

uniprocessor perform. enhanc., adaptive clock freq. control. Uht, A.K., T-C Feb 2005132-140

Cluster approximation

instruction replication for reducing delays due to inter-PE communication latency. Aggarwal, A., + , T-C Dec 20051496-1507

CMOSFET logic devices

energy aware comput., probabilistic switching, study of limits. Palem, K.V., T-C Sep 051123-1137

Si, charge-recovery comput. Suhwan Kim, + , T-C Jun 05651-659

Code division multiple access

joint reliability of medium access control and radio link protocol in 3G CDMA systems. Chatterjee, M., + , T-C Dec 20051584-1597

Codes;
see Arithmetic codes; Block codes; Cyclic codes; Entropy codes; Hamming codes; Huffman codes; Linear codes; Reed-Solomon codes
Combinational logic circuits

high-speed multioperand decimal adders. Kenney, R.D., + , T-C Aug 2005953-963

low complexity word-level seq. normal basis multipliers. Reyhani-Masoleh, A., + , T-C Feb 200598-110

parallel decoding cyclic burst error correcting codes. Umanesan, G., + , T-C Jan 200587-92

Combinatorial mathematics;
see Graph theory
Communication channels

SAN syst., fiber channel protocol, design and implement. Jiwu Shu, + , T-C Apr 05439-448

Communication system reliability

wireless nets., max. lifetime broadcasting. Park, J., + , T-C Sep 051081-1090

Communication system routing

B-tree dyn. router-table design. Lu, H., + , T-C Jul 05813-824

computer clusters, irregular topologies, presence of multiple node and link failures, dyn. reconfiguration. Avresky, D., + , T-C May 05603-615

distrib. coverage- and connectivity-centric tech. for selecting act. nodes, wireless sens. nets. Yi Zou, + , T-C Aug 2005978-991

EaseCAM, energy and storage efficient TCAM-based router archit. for IP lookup. Ravikumar, V.C., + , T-C May 05521-533

prefix and interval-partitioned dyn. IP router-tables. Haibin Lu, + , T-C May 05545-557

SAN syst., fiber channel protocol, design and implement. Jiwu Shu, + , T-C Apr 05439-448

Communication system traffic

adaptive connection establishment, improv. unstructured peer-to-peer systs. Xiao, L., + , T-C Sep 051091-1103

aggregate streaming data, optimal lexicographic shaping. Anastasiadis, S.V., + , T-C Apr 05398-408

packet inspection computers, preventing session table explosion. Hyogon Kim, + , T-C Feb 2005238-240

proportional slowdown differentiation, Internet servers, robust proc. rate allocation. Wei, J., + , T-C Aug 2005964-977

Compaction

VPC trace-compression algorithms. Burtscher, M., + , T-C Nov 20051329-1344

Complexity theory

1-variable fn., lattice reduction, searching worst cases. Stehle, D., + , T-C Mar 05340-346

arith. operations via controlled transport of charge, addit. Cotofana, S., + , T-C Mar 05243-256

B-tree dyn. router-table design. Lu, H., + , T-C Jul 05813-824

BWT-based data compress., antisequential suffix sorting. Baron, D., + , T-C Apr 05385-397

clustered worst-case execution-time calc. Ermedahl, A., + , T-C Sep 051104-1122

composite fields, given representations, efficient basis conversion algm. Sunar, B., T-C Aug 2005992-997

computer clusters, irregular topologies, presence of multiple node and link failures, dyn. reconfiguration. Avresky, D., + , T-C May 05603-615

distrib. coverage- and connectivity-centric tech. for selecting act. nodes, wireless sens. nets. Yi Zou, + , T-C Aug 2005978-991

error-detect. codes, algms. and fast implement. Nguyen, G.D., T-C Jan 20051-11

KR-Benes net., control-optimal rearrangeable permutation net. Rajgopal Kannan, T-C May 05534-544

low complexity word-level seq. normal basis multipliers. Reyhani-Masoleh, A., + , T-C Feb 200598-110

LZW compress. files, pattern matching. Tao, T., + , T-C Aug 2005929-938

modular multiplication/division, hardware algm. Kaihara, M.E., + , T-C Jan 200512-21

multiple channels, flat broadcast per channel, optimal skewed data allocation. Ardizzoni, E., + , T-C May 05558-572

pair of integers, left-to-right optimal signed-binary representation. Ruan, X., + , T-C Feb 2005124-131

reservation-based real-time systs., variable execution times, efficient reclaiming. Caccamo, M., + , T-C Feb 2005198-213

secure multicast key mgt., high-order tree. Lu, H., T-C Feb 2005214-224

sens. nets., optimized broadcast protocol. Durresi, A., + , T-C Aug 20051013-1024

trinomials, fast bit-parallel GF(2n) multiplier. Haining Fan, + , T-C Apr 05485-490

unidirectional bit serial systolic archits. for multiplicative inversion and division, GF(2m), class. Daneshbeh, A.K., + , T-C Mar 05370-380

Computational complexity

correction to "Efficient reclaiming in reservation-based real-time systems with variable execution times" (Feb 05 198-213). Caccamo, M., + , T-C Jun 05783

Computational geometry

3D computer graphics, high-throughput CORDIC-based geom. operations. Lang, T., + , T-C Mar 05347-361

Computer applications;
see Multimedia systems
Computer architecture

designing energy-efficient cluster interconnects, holistic approach. Kim, E.J., + , T-C Jun 05660-671

multipartite table methods. de Dinechin, F., + , T-C Mar 05319-330

net.-on-chip interconnect archits., perform. eval. and design trade-offs. Partha Pratim Pande, + , T-C Aug 20051025-1040

real-time algm.-specific tasks, GAARP, power-aware GALS archit. Swarup Bhunia, + , T-C Jun 05752-766

single-chip heterog. multiprocessors, power-perform. simul. and design strategies. Meyer, B.H., + , T-C Jun 05684-697

tree parity machine rekeying archits. Volkmer, M., + , T-C Apr 05421-427

uniprocessor perform. enhanc., adaptive clock freq. control. Uht, A.K., T-C Feb 2005132-140

Computer architecture;
see Memory architecture; Parallel architectures; Reconfigurable architectures; Reduced instruction set computing
Computer architectures

improving computer archit. simul. methodology by adding stat. rigor. Yi, J.J., + , T-C Nov 20051360-1373

Computer crime

secure processors, improv. memory encryption perform. Jun Yang, + , T-C May 05630-640

Computer fault tolerance

BC graphs, t/k-diagnosability. Jianxi Fan, + , T-C Feb 2005176-184

computer clusters, irregular topologies, presence of multiple node and link failures, dyn. reconfiguration. Avresky, D., + , T-C May 05603-615

distrib. channel allocation scheme for cellular nets. Yang, J., + , T-C May 05616-629

event region detect., wireless sens. nets., distrib. Bayesian algms. Qingchun Chen, + , T-C Sep 051182-1183

large multiprocessor systs., conditional diagnosability measures. Pao-Lien Lai, + , T-C Feb 2005165-175

low cost and high speed embedded 2-rail code checker. Omana, M., + , T-C Feb 2005153-164

Computer graphics

3D computer graphics, high-throughput CORDIC-based geom. operations. Lang, T., + , T-C Mar 05347-361

Computer instructions

energy-efficient banked register file, speculative control scheme. Tseng, J.H., + , T-C Jun 05741-751

energy efficient instruction set synthesis framework for low power embedded syst. designs. Cheng, A.C., + , T-C Jun 05698-713

low energy VLIW embedded processors, clustered loop buffer organization. Jayapala, M., + , T-C Jun 05672-683

motion estim., hardware/software realizations, power and perform. anal. Yang, S., + , T-C Jun 05714-726

reduce spill code, low-power processor, partitioning variables across register windows. Ravindran, R.A., + , T-C Aug 2005998-1012

single-chip heterog. multiprocessors, power-perform. simul. and design strategies. Meyer, B.H., + , T-C Jun 05684-697

software Trace Cache. Ramirez, A., + , T-C Jan 200522-35

Computer interfaces;
see Network interfaces
Computerized instrumentation;
see Automatic test equipment
Computer network management

clusters, irregular topologies, presence of multiple node and link failures, dyn. reconfiguration. Avresky, D., + , T-C May 05603-615

distrib. inform. monitoring appls., scalable peer-to-peer archit. Gedik, B., + , T-C Jun 05767-782

Computer network reliability

clusters, irregular topologies, presence of multiple node and link failures, dyn. reconfiguration. Avresky, D., + , T-C May 05603-615

Computer networks

order incremental CRC comput., out. Satran, J., + , T-C Sep 051178-1181

Computer networks;
see Computer network management; Computer network reliability; Internetworking; Local area networks
Computers

energy efficient computing (special section). T-C Jun 05641-766

energy efficient computing (special section intro.). Mudge, T., T-C Jun 05641

Computer software

frequent loop detection using efficient nonintrusive on-chip hardware. Gordon-Ross, A., + , T-C Oct 20051203-1215

supporting demanding hard-real-time systems with STI. Welch, B., + , T-C Oct 20051188-1202

systs. support for preemptive disk schedul. Dimitrijevic, Z., + , T-C Oct 20051314-1326

Computer software;
see Software packages; Systems software
Content management

bounded-latency content distrib., feasibility and eval. Huang, C., + , T-C Nov 20051422-1437

Control of specific variables;
see Frequency control
Control theory;
see Optimal control
Coprocessors

3D computer graphics, high-throughput CORDIC-based geom. operations. Lang, T., + , T-C Mar 05347-361

Costs

optimal deterministic partitionings, scan-based BIST fault diagnosis, constr. Bayraktaroglu, I., + , T-C Jan 200561-75

Cryptography

carry-free architecture for Montgomery inversion. Savas, E., T-C Dec 20051508-1519

design and properties of a new pseudorandom generator based on a filtered FCSR automaton. Arnault, F., + , T-C Nov 20051374-1383

dual-rail ccts. for security appls., design and anal. Sokolov, D., + , T-C Apr 05449-460

efficient diminished-1 modulo 2n + 1 multipliers. Efstathiou, C., + , T-C Apr 05491-496

energy scalable universal hashing. Kaps, J.-P., + , T-C Dec 20051484-1495

executing compress. and encryption appls., general purpose processors, implications. Lee, B.K., + , T-C Jul 05917-922

low complexity word-level seq. normal basis multipliers. Reyhani-Masoleh, A., + , T-C Feb 200598-110

secure multicast key mgt., high-order tree. Lu, H., T-C Feb 2005214-224

secure processors, improv. memory encryption perform. Jun Yang, + , T-C May 05630-640

Cryptography;
see Public key cryptography
Cyclic codes

parallel decoding cyclic burst error correcting codes. Umanesan, G., + , T-C Jan 200587-92

D
Database management systems

prefix and interval-partitioned dyn. IP router-tables. Haibin Lu, + , T-C May 05545-557

Data compression

arith. coding, compress. of VLSI test data. Hashempour, H., + , T-C Sep 051166-1177

BWT-based data compress., antisequential suffix sorting. Baron, D., + , T-C Apr 05385-397

executing compress. and encryption appls., general purpose processors, implications. Lee, B.K., + , T-C Jul 05917-922

LZW compress. files, pattern matching. Tao, T., + , T-C Aug 2005929-938

on-chip IP address lookup algm. Sun, X., + , T-C Jul 05873-885

universal text preprocessing. Abel, J., + , T-C May 05497-507

Data conversion;
see Analog-digital conversion; Digital-analog conversion
Data flow graphs

minimizing energy consumption of VLSI processors, multiple supply voltages, genetic approach. Hariyama, M., + , T-C Jun 05642-650

Data handling;
see Multimedia computing; Sorting; String matching; Table lookup
Data security

energy scalable universal hashing. Kaps, J.-P., + , T-C Dec 20051484-1495

tree parity machine rekeying archits. Volkmer, M., + , T-C Apr 05421-427

Data structures

prefix and interval-partitioned dyn. IP router-tables. Haibin Lu, + , T-C May 05545-557

Data structures;
see Tree data structures
Decoding

parallel decoding cyclic burst error correcting codes. Umanesan, G., + , T-C Jan 200587-92

Delay effects

coarse-grain phased logic CPU. Reese, R.B., + , T-C Jul 05788-799

Design aids

design and properties of a new pseudorandom generator based on a filtered FCSR automaton. Arnault, F., + , T-C Nov 20051374-1383

improving computer archit. simul. methodology by adding stat. rigor. Yi, J.J., + , T-C Nov 20051360-1373

VPC trace-compression algorithms. Burtscher, M., + , T-C Nov 20051329-1344

Design automation

dual-rail ccts. for security appls., design and anal. Sokolov, D., + , T-C Apr 05449-460

Detector circuits;
see Peak detectors
Digital-analog conversion

arith. operations via controlled transport of charge, addit. Cotofana, S., + , T-C Mar 05243-256

Digital arithmetic

5, 6, 7-term Karatsuba-like formulas. Montgomery, P.L., T-C Mar 05362-369

arith. operations via controlled transport of charge, addit. Cotofana, S., + , T-C Mar 05243-256

binary-to-multidigit multidimensional logarithmic no. syst. conversion, range-addressable look-up tables, efficient techs. Muscedere, R., + , T-C Mar 05257-271

cantor vs. Harley. Wollinger, T., + , T-C Jul 05861-872

composite fields, given representations, efficient basis conversion algm. Sunar, B., T-C Aug 2005992-997

digit-recurrence dividers, reduced logical depth. Antelo, E., + , T-C Jul 05837-851

hardware/software normal basis arith. for pairing-based cryptography, charact. 3. Granger, R., + , T-C Jul 05852-860

higher radix multipliers, secondary radix recodings. Seidel, P.-M., + , T-C Feb 2005111-123

high-perform. low-power left-to-right array multiplier design. Zhijun Huang, + , T-C Mar 05272-283

low complexity word-level seq. normal basis multipliers. Reyhani-Masoleh, A., + , T-C Feb 200598-110

multipartite table methods. de Dinechin, F., + , T-C Mar 05319-330

optimal deterministic partitionings, scan-based BIST fault diagnosis, constr. Bayraktaroglu, I., + , T-C Jan 200561-75

pair of integers, left-to-right optimal signed-binary representation. Ruan, X., + , T-C Feb 2005124-131

special classes of GF(2m), low-complexity bit-parallel systolic Montgomery multipliers. Chiou-Yng Lee, + , T-C Sep 051061-1070

SRT division and sq. root, digit selection. Kornerup, P., T-C Mar 05294-303

trinomials, fast bit-parallel GF(2n) multiplier. Haining Fan, + , T-C Apr 05485-490

unidirectional bit serial systolic archits. for multiplicative inversion and division, GF(2m), class. Daneshbeh, A.K., + , T-C Mar 05370-380

Digital arithmetic;
see Coprocessors; Floating point arithmetic; Redundant number systems
Digital circuits

ultra-low energy wireless microsensor nodes, design considerations. Calhoun, B.H., + , T-C Jun 05727-740

Digital circuits;
see Adders; Switching circuits
Digital computers;
see Microcomputers; Parallel machines
Digital signal processing chips

code size reduction in heterogeneous-connectivity-based DSPs using instruction set extensions. Biswas, P., + , T-C Oct 20051216-1226

Digital signal processors

floating-point multimedia appls., fuzzy memoization. Alvarez, C., + , T-C Jul 05922-927

trading off quantization error, hardware resources for MATLAB-based FPGA design, algm. Sanghamitra Roy, + , T-C Jul 05886-896

Digital storage;
see Buffer storage; Memory cards
Digital systems;
see Computer networks
Directed graphs

BC graphs, t/k-diagnosability. Jianxi Fan, + , T-C Feb 2005176-184

Disc drives

systs. support for preemptive disk schedul. Dimitrijevic, Z., + , T-C Oct 20051314-1326

Discrete cosine transforms

2D DCT, characterizations. Bique, S., T-C Sep 051054-1060

Discrete Fourier transforms

sched., common comput.-dags for Internet-based comput., guidelines. Rosenberg, A.L., + , T-C Apr 05428-438

Discrete transforms;
see Discrete cosine transforms; Discrete Fourier transforms
Disc storage

MDS array codes for RAID, Rabin-like codes for tolerating multiple disk failures. Feng, G.-L., + , T-C Dec 20051473-1483

Disk storage;
see RAID
Distributed algorithms

fault-tolerant event region detect., wireless sens. nets., distrib. Bayesian algms. Qingchun Chen, + , T-C Sep 051182-1183

Distributed processing

fair bandwidth sharing in distributed systems. Rakshit, S., + , T-C Nov 20051384-1393

Distributed processing;
see Client-server systems; Computer networks; Distributed algorithms; Message passing; Parallel processing; Pipeline processing; Processor scheduling
Distribution networks

bounded-latency content distrib., feasibility and eval. Huang, C., + , T-C Nov 20051422-1437

causality-based predicate detection across space and time. Chandra, P., + , T-C Nov 20051438-1453

Dynamic programming

multiple channels, flat broadcast per channel, optimal skewed data allocation. Ardizzoni, E., + , T-C May 05558-572

Dynamic programming;
see Integer programming
E
Electronic equipment testing;
see Circuit testing
Electronic publishing;
see Content management
Elliptic equations

new minimal average weight represent. for left-to-right point multipl. methods. Khabbazian, M., + , T-C Nov 20051454-1459

Embedded systems

exact stochastic analysis of priority-driven periodic real-time systems and its approx. Kim, K., + , T-C Nov 20051460-1466

frequent loop detection using efficient nonintrusive on-chip hardware. Gordon-Ross, A., + , T-C Oct 20051203-1215

Energy conservation

aware comput., probabilistic switching, study of limits. Palem, K.V., T-C Sep 051123-1137

designing energy-efficient cluster interconnects, holistic approach. Kim, E.J., + , T-C Jun 05660-671

energy efficient computing (special section). T-C Jun 05641-766

energy efficient computing (special section intro.). Mudge, T., T-C Jun 05641

fault-tolerant protocol for energy-efficient permutation routing in wireless networks. Datta, A., T-C Nov 20051409-1421

location-aided flooding. Sabbineni, H., + , T-C Jan 200536-46

minimizing energy consumption of VLSI processors, multiple supply voltages, genetic approach. Hariyama, M., + , T-C Jun 05642-650

real-time algm.-specific tasks, GAARP, power-aware GALS archit. Swarup Bhunia, + , T-C Jun 05752-766

Si, charge-recovery comput. Suhwan Kim, + , T-C Jun 05651-659

wireless nets., max. lifetime broadcasting. Park, J., + , T-C Sep 051081-1090

Energy resources;
see Energy conservation
Entropy;
see Entropy codes
Entropy codes

arith. coding, compress. of VLSI test data. Hashempour, H., + , T-C Sep 051166-1177

Equations;
see Elliptic equations
Error analysis

fault-tolerant event region detect., wireless sens. nets., distrib. Bayesian algms. Qingchun Chen, + , T-C Sep 051182-1183

low cost and high speed embedded 2-rail code checker. Omana, M., + , T-C Feb 2005153-164

replication cache, small fully associative cache to improve data cache reliability. Zhang, W., T-C Dec 20051547-1555

Error correction

fault-tolerant event region detect., wireless sens. nets., distrib. Bayesian algms. Qingchun Chen, + , T-C Sep 051182-1183

Error correction coding

capacity of unidirectional channels, bounds. Tallini, L.G., T-C Feb 2005232-235

parallel decoding cyclic burst error correcting codes. Umanesan, G., + , T-C Jan 200587-92

Error detection

concurrent detection of control flow errors by hybrid signature monitoring. Chen, Y.-Y., T-C Oct 20051298-1313

Error detection coding

algms. and fast implement. Nguyen, G.D., T-C Jan 20051-11

low cost and high speed embedded 2-rail code checker. Omana, M., + , T-C Feb 2005153-164

order incremental CRC comput., out. Satran, J., + , T-C Sep 051178-1181

Evolutionary computation;
see Genetic algorithms
F
Failure analysis

MDS array codes for RAID, Rabin-like codes for tolerating multiple disk failures. Feng, G.-L., + , T-C Dec 20051473-1483

Fast Fourier transforms;
see Discrete Fourier transforms
Fault diagnosis

aliasing probability calculations for arbitrary compaction under independently selected random test vectors. Hadjicostis, C.N., T-C Dec 20051614-1627

BC graphs, t/k-diagnosability. Jianxi Fan, + , T-C Feb 2005176-184

diagnosis of multiple hold-time and setup-time faults in scan chains. Li, J.C.-M., T-C Nov 20051467-1472

large multiprocessor systs., conditional diagnosability measures. Pao-Lien Lai, + , T-C Feb 2005165-175

optimal deterministic partitionings, scan-based BIST fault diagnosis, constr. Bayraktaroglu, I., + , T-C Jan 200561-75

Fault tolerance

fault-tolerant protocol for energy-efficient permutation routing in wireless networks. Datta, A., T-C Nov 20051409-1421

Field effect logic circuits;
see MOS logic circuits
Field programmable gate arrays

multipartite table methods. de Dinechin, F., + , T-C Mar 05319-330

trading off quantization error, hardware resources for MATLAB-based FPGA design, algm. Sanghamitra Roy, + , T-C Jul 05886-896

uniprocessor perform. enhanc., adaptive clock freq. control. Uht, A.K., T-C Feb 2005132-140

File organization

energy scalable universal hashing. Kaps, J.-P., + , T-C Dec 20051484-1495

File organization;
see Database management systems; Data structures
File systems

LZW compress. files, pattern matching. Tao, T., + , T-C Aug 2005929-938

reduce spill code, low-power processor, partitioning variables across register windows. Ravindran, R.A., + , T-C Aug 2005998-1012

Filters;
see FIR filters
Finite automata;
see Finite state machines
Finite element analysis;
see Mesh generation
Finite state machines

partial deterministic FSM specs., testing. Petrenko, A., + , T-C Sep 051154-1165

FIR filters

optimiz. of hardware multiplication by constant matrices. Boullis, N. , + , T-C Oct 20051271-1282

Floating point arithmetic

1-variable fn., lattice reduction, searching worst cases. Stehle, D., + , T-C Mar 05340-346

FPU implementations, denormalized nos. Schwarz, E.M., + , T-C Jul 05825-836

high-speed fn. approx., minimax quadratic interpolator. Pineiro, J.-A., + , T-C Mar 05304-318

high-speed multioperand decimal adders. Kenney, R.D., + , T-C Aug 2005953-963

multimedia appls., fuzzy memoization. Alvarez, C., + , T-C Jul 05922-927

range-reduction algm. Brisebarre, N., + , T-C Mar 05331-339

trading off quantization error, hardware resources for MATLAB-based FPGA design, algm. Sanghamitra Roy, + , T-C Jul 05886-896

Flow graphs;
see Data flow graphs
Formal logic;
see Boolean functions; Fuzzy logic
Frequency control

uniprocessor perform. enhanc., adaptive clock freq. control. Uht, A.K., T-C Feb 2005132-140

Function evaluation

optimizing hardware function evaluation. Lee, D., + , T-C Dec 20051520-1531

Functions

binary decision diags., av. path length. Butler, J.T., + , T-C Sep 051041-1053

Functions;
see Boolean functions; Random functions; Transforms
Fuzzy logic

floating-point multimedia appls., fuzzy memoization. Alvarez, C., + , T-C Jul 05922-927

G
Galois fields

5, 6, 7-term Karatsuba-like formulas. Montgomery, P.L., T-C Mar 05362-369

low complexity word-level seq. normal basis multipliers. Reyhani-Masoleh, A., + , T-C Feb 200598-110

special classes of GF(2m), low-complexity bit-parallel systolic Montgomery multipliers. Chiou-Yng Lee, + , T-C Sep 051061-1070

unidirectional bit serial systolic archits. for multiplicative inversion and division, GF(2m), class. Daneshbeh, A.K., + , T-C Mar 05370-380

Game theory

fair bandwidth sharing in distributed systems. Rakshit, S., + , T-C Nov 20051384-1393

Genetic algorithms

minimizing energy consumption of VLSI processors, multiple supply voltages, genetic approach. Hariyama, M., + , T-C Jun 05642-650

Geometry;
see Computational geometry
Graph theory

large multiprocessor systs., conditional diagnosability measures. Pao-Lien Lai, + , T-C Feb 2005165-175

Graph theory;
see Directed graphs
H
Hamming codes

error-detect. codes, algms. and fast implement. Nguyen, G.D., T-C Jan 20051-11

Hard disks

hierarchical adaptive dyn. power mgt. Ren, Z., + , T-C Apr 05409-420

power-aware storage cache mgt. Zhu, Q., + , T-C May 05587-602

Hidden Markov models

config. stat. lossless compression cored based on variable order Markov modeling and arith. coding. Nunez-Yanez, J.L., + , T-C Nov 20051345-1359

High-level synthesis

embedded processors, software-based self-testing. Kranitis, N., + , T-C Apr 05461-475

minimizing energy consumption of VLSI processors, multiple supply voltages, genetic approach. Hariyama, M., + , T-C Jun 05642-650

Huffman codes

arith. coding, compress. of VLSI test data. Hashempour, H., + , T-C Sep 051166-1177

Hypercubes

BC graphs, t/k-diagnosability. Jianxi Fan, + , T-C Feb 2005176-184

large multiprocessor systs., conditional diagnosability measures. Pao-Lien Lai, + , T-C Feb 2005165-175

I
IEEE

list of reviewers, 2004. T-C Jan 200593-96

tribute to B. Ramakrishna (special issue). T-C Oct 20051185-1270

tribute to B. Ramakrishna (special issue intro.). Hwu, W.-M.W., + , T-C Oct 20051185-1187

IEEE standards

FPU implementations, denormalized nos. Schwarz, E.M., + , T-C Jul 05825-836

high-speed multioperand decimal adders. Kenney, R.D., + , T-C Aug 2005953-963

Image coding;
see Video coding
Information networks;
see Internet
Information rates

capacity of unidirectional channels, bounds. Tallini, L.G., T-C Feb 2005232-235

Information retrieval

LZW compress. files, pattern matching. Tao, T., + , T-C Aug 2005929-938

Information science;
see Information retrieval
Information systems;
see Database management systems
Information theory

capacity of unidirectional channels, bounds. Tallini, L.G., T-C Feb 2005232-235

Information theory;
see Decoding; Prediction theory
Instruction sets

automated custom instruction generation for domain-specific processor acceleration. Clark, N.T., + , T-C Oct 20051258-1270

code size reduction in heterogeneous-connectivity-based DSPs using instruction set extensions. Biswas, P., + , T-C Oct 20051216-1226

distributed data cache designs for clustered VLIW processors. Gibert, E., + , T-C Oct 20051227-1241

tribute to B. Ramakrishna (special issue). T-C Oct 20051185-1270

tribute to B. Ramakrishna (special issue intro.). Hwu, W.-M.W., + , T-C Oct 20051185-1187

Instruments;
see Clocks
Integer programming

distrib. coverage- and connectivity-centric tech. for selecting act. nodes, wireless sens. nets. Yi Zou, + , T-C Aug 2005978-991

Integrated circuit design

ultra-low energy wireless microsensor nodes, design considerations. Calhoun, B.H., + , T-C Jun 05727-740

Integrated circuit design;
see Integrated circuit layout
Integrated circuit interconnections

net.-on-chip interconnect archits., perform. eval. and design trade-offs. Partha Pratim Pande, + , T-C Aug 20051025-1040

Integrated circuit layout

SMT/CMP throughput, area and syst. clock effects. Burns, J., + , T-C Feb 2005141-152

Integrated circuit technology;
see Integrated circuit interconnections
Integrated circuit testing

arith. coding, compress. of VLSI test data. Hashempour, H., + , T-C Sep 051166-1177

Integration

supporting demanding hard-real-time systems with STI. Welch, B., + , T-C Oct 20051188-1202

Interconnections;
see Integrated circuit interconnections
Internet

adaptive connection establishment, improv. unstructured peer-to-peer systs. Xiao, L., + , T-C Sep 051091-1103

B-tree dyn. router-table design. Lu, H., + , T-C Jul 05813-824

distrib. inform. monitoring appls., scalable peer-to-peer archit. Gedik, B., + , T-C Jun 05767-782

proportional slowdown differentiation, Internet servers, robust proc. rate allocation. Wei, J., + , T-C Aug 2005964-977

sched., common comput.-dags for Internet-based comput., guidelines. Rosenberg, A.L., + , T-C Apr 05428-438

Internetworking

location-aided flooding. Sabbineni, H., + , T-C Jan 200536-46

Interpolation

high-speed fn. approx., minimax quadratic interpolator. Pineiro, J.-A., + , T-C Mar 05304-318

L
Land mobile radio cellular systems

fault-tolerant distrib. channel allocation scheme for cellular nets. Yang, J., + , T-C May 05616-629

Linear codes

error-detect. codes, algms. and fast implement. Nguyen, G.D., T-C Jan 20051-11

RAID., efficient MDS array codes, I. Feng, G.-L., + , T-C Sep 051071-1080

Linear programming

distrib. coverage- and connectivity-centric tech. for selecting act. nodes, wireless sens. nets. Yi Zou, + , T-C Aug 2005978-991

Local area networks

fair bandwidth sharing in distributed systems. Rakshit, S., + , T-C Nov 20051384-1393

Logic;
see Logic design
Logic circuits

arith. operations via controlled transport of charge, addit. Cotofana, S., + , T-C Mar 05243-256

dual-rail ccts. for security appls., design and anal. Sokolov, D., + , T-C Apr 05449-460

Logic circuit testing

arith. coding, compress. of VLSI test data. Hashempour, H., + , T-C Sep 051166-1177

Logic design

binary decision diags., av. path length. Butler, J.T., + , T-C Sep 051041-1053

coarse-grain phased logic CPU. Reese, R.B., + , T-C Jul 05788-799

Si, charge-recovery comput. Suhwan Kim, + , T-C Jun 05651-659

trading off quantization error, hardware resources for MATLAB-based FPGA design, algm. Sanghamitra Roy, + , T-C Jul 05886-896

uniprocessor perform. enhanc., adaptive clock freq. control. Uht, A.K., T-C Feb 2005132-140

Logic design;
see Logic partitioning
Logic devices;
see Logic circuits
Logic partitioning

optimal deterministic partitionings, scan-based BIST fault diagnosis, constr. Bayraktaroglu, I., + , T-C Jan 200561-75

ultra-low energy wireless microsensor nodes, design considerations. Calhoun, B.H., + , T-C Jun 05727-740

M
Machine oriented languages;
see Instruction sets
Magnetic disk storage;
see Hard disks
Management;
see Content management
Markov processes

config. stat. lossless compression cored based on variable order Markov modeling and arith. coding. Nunez-Yanez, J.L., + , T-C Nov 20051345-1359

exact stochastic analysis of priority-driven periodic real-time systems and its approx. Kim, K., + , T-C Nov 20051460-1466

hierarchical adaptive dyn. power mgt. Ren, Z., + , T-C Apr 05409-420

Markov processes;
see Hidden Markov models
Mathematical analysis;
see Transforms
Mathematical programming;
see Dynamic programming; Linear programming
Mathematics;
see Arithmetic; Functions; Number theory; Probability; Set theory
Matrices

2D DCT, characterizations. Bique, S., T-C Sep 051054-1060

RAID., efficient MDS array codes, I. Feng, G.-L., + , T-C Sep 051071-1080

Matrix algebra;
see Matrix decomposition; Matrix inversion; Matrix multiplication
Matrix decomposition

composite fields, given representations, efficient basis conversion algm. Sunar, B., T-C Aug 2005992-997

Matrix inversion

carry-free architecture for Montgomery inversion. Savas, E., T-C Dec 20051508-1519

Matrix multiplication

parallel decoding cyclic burst error correcting codes. Umanesan, G., + , T-C Jan 200587-92

Memory architecture

conflict miss reduction, embedded multimedia appls., cache conscious data layout organization. Kulkarni, C., + , T-C Jan 200576-81

executing compress. and encryption appls., general purpose processors, implications. Lee, B.K., + , T-C Jul 05917-922

on-chip IP address lookup algm. Sun, X., + , T-C Jul 05873-885

parameterized loop nests for direct mapped data cache, line size adaptivity anal. D'Alberto, P., + , T-C Feb 2005185-197

secure processors, improv. memory encryption perform. Jun Yang, + , T-C May 05630-640

software Trace Cache. Ramirez, A., + , T-C Jan 200522-35

XOR-based hash fns. Vandierendonck, H., + , T-C Jul 05800-812

Memory cards

lattice-based memory allocation. Darte, A., + , T-C Oct 20051242-1257

Memory management

aggregate streaming data, optimal lexicographic shaping. Anastasiadis, S.V., + , T-C Apr 05398-408

enhancing memory-level parallelism via recovery-free value predict. Zhou, H., + , T-C Jul 05897-912

packet inspection computers, preventing session table explosion. Hyogon Kim, + , T-C Feb 2005238-240

secure processors, improv. memory encryption perform. Jun Yang, + , T-C May 05630-640

Memory protocols

SAN syst., fiber channel protocol, design and implement. Jiwu Shu, + , T-C Apr 05439-448

Mesh generation

sched., common comput.-dags for Internet-based comput., guidelines. Rosenberg, A.L., + , T-C Apr 05428-438

Message passing

error-detect. codes, algms. and fast implement. Nguyen, G.D., T-C Jan 20051-11

Microcomputers

hierarchical adaptive dyn. power mgt. Ren, Z., + , T-C Apr 05409-420

Microcontrollers

coarse-grain phased logic CPU. Reese, R.B., + , T-C Jul 05788-799

Micromechanical devices;
see Microsensors
Microprocessor chips;
see Coprocessors; Digital signal processing chips; Microcontrollers
Microprocessors

energy efficient instruction set synthesis framework for low power embedded syst. designs. Cheng, A.C., + , T-C Jun 05698-713

single-chip heterog. multiprocessors, power-perform. simul. and design strategies. Meyer, B.H., + , T-C Jun 05684-697

Microsensors

ultra-low energy wireless microsensor nodes, design considerations. Calhoun, B.H., + , T-C Jun 05727-740

Military aircraft

component-oriented phased array radars, real-time dwell sched. Tei-Wei Kuo, + , T-C Jan 200547-60

Military systems;
see Military aircraft
Minimax methods

high-speed fn. approx., minimax quadratic interpolator. Pineiro, J.-A., + , T-C Mar 05304-318

Minimization methods

multiple channels, flat broadcast per channel, optimal skewed data allocation. Ardizzoni, E., + , T-C May 05558-572

Minimum principle

new minimal average weight represent. for left-to-right point multipl. methods. Khabbazian, M., + , T-C Nov 20051454-1459

Mobile communication

config. stat. lossless compression cored based on variable order Markov modeling and arith. coding. Nunez-Yanez, J.L., + , T-C Nov 20051345-1359

fault-tolerant protocol for energy-efficient permutation routing in wireless networks. Datta, A., T-C Nov 20051409-1421

multiple channels, flat broadcast per channel, optimal skewed data allocation. Ardizzoni, E., + , T-C May 05558-572

Modeling

config. stat. lossless compression cored based on variable order Markov modeling and arith. coding. Nunez-Yanez, J.L., + , T-C Nov 20051345-1359

Monitoring

concurrent detection of control flow errors by hybrid signature monitoring. Chen, Y.-Y., T-C Oct 20051298-1313

Monolithic integrated circuits;
see Application specific integrated circuits
MOS digital integrated circuits;
see MOS logic circuits
MOS logic circuits

instruction replication for reducing delays due to inter-PE communication latency. Aggarwal, A., + , T-C Dec 20051496-1507

Motion analysis

hardware/software realizations, power and perform. anal. Yang, S., + , T-C Jun 05714-726

Multi-access systems;
see Code division multiple access
Multicast communication

FIFO-based multicast schedul. algorithm for virtual output queued packet switches. Pan, D., + , T-C Oct 20051283-1297

Multimedia computing

floating-point multimedia appls., fuzzy memoization. Alvarez, C., + , T-C Jul 05922-927

Multimedia systems

conflict miss reduction, embedded multimedia appls., cache conscious data layout organization. Kulkarni, C., + , T-C Jan 200576-81

Multimedia systems;
see Multimedia computing
Multiplexing

aggregate streaming data, optimal lexicographic shaping. Anastasiadis, S.V., + , T-C Apr 05398-408

Multiplying circuits

arith. operations via controlled transport of charge, addit. Cotofana, S., + , T-C Mar 05243-256

efficient diminished-1 modulo 2n + 1 multipliers. Efstathiou, C., + , T-C Apr 05491-496

higher radix multipliers, secondary radix recodings. Seidel, P.-M., + , T-C Feb 2005111-123

low complexity word-level seq. normal basis multipliers. Reyhani-Masoleh, A., + , T-C Feb 200598-110

modular multiplication/division, hardware algm. Kaihara, M.E., + , T-C Jan 200512-21

special classes of GF(2m), low-complexity bit-parallel systolic Montgomery multipliers. Chiou-Yng Lee, + , T-C Sep 051061-1070

trinomials, fast bit-parallel GF(2n) multiplier. Haining Fan, + , T-C Apr 05485-490

Multiprocessing

2D DCT, characterizations. Bique, S., T-C Sep 051054-1060

BC graphs, t/k-diagnosability. Jianxi Fan, + , T-C Feb 2005176-184

large multiprocessor systs., conditional diagnosability measures. Pao-Lien Lai, + , T-C Feb 2005165-175

net.-on-chip interconnect archits., perform. eval. and design trade-offs. Partha Pratim Pande, + , T-C Aug 20051025-1040

scaling up Atlas chip-multiprocessor. Sassone, P.G., + , T-C Jan 200582-87

single-chip heterog. multiprocessors, power-perform. simul. and design strategies. Meyer, B.H., + , T-C Jun 05684-697

SMT/CMP throughput, area and syst. clock effects. Burns, J., + , T-C Feb 2005141-152

Multiprocessor interconnection

designing energy-efficient cluster interconnects, holistic approach. Kim, E.J., + , T-C Jun 05660-671

KR-Benes net., control-optimal rearrangeable permutation net. Rajgopal Kannan, T-C May 05534-544

N
Network interfaces

network interface data caching. Kim, H.-y., + , T-C Nov 20051394-1408

Networks (circuits);
see Distribution networks; Multiplying circuits; Switching circuits
Network servers

network interface data caching. Kim, H.-y., + , T-C Nov 20051394-1408

proportional slowdown differentiation, Internet servers, robust proc. rate allocation. Wei, J., + , T-C Aug 2005964-977

Network synthesis;
see Integrated circuit design
Number theory

computer arithmetic (special issue). T-C Mar 05241-380

computer arithmetic (special issue intro.). Schulte, M.J., + , T-C Mar 05241-242

Numerical analysis;
see Error analysis; Function evaluation; Interpolation
O
Open systems

SAN syst., fiber channel protocol, design and implement. Jiwu Shu, + , T-C Apr 05439-448

Operating systems

dyn. task-level voltage sched. optimizations. Barnett, J.A., T-C May 05508-520

weak locality workloads, making LRU friendly. Jiang, S., + , T-C Aug 2005939-952

Operating systems (computers)

network interface data caching. Kim, H.-y., + , T-C Nov 20051394-1408

Operations research;
see Scheduling
Optical communication;
see Optical fiber communication
Optical fiber communication

SAN syst., fiber channel protocol, design and implement. Jiwu Shu, + , T-C Apr 05439-448

Optimal control

KR-Benes net., control-optimal rearrangeable permutation net. Rajgopal Kannan, T-C May 05534-544

Optimal control;
see Minimum principle
Optimization

frequent loop detection using efficient nonintrusive on-chip hardware. Gordon-Ross, A., + , T-C Oct 20051203-1215

optimizing hardware function evaluation. Lee, D., + , T-C Dec 20051520-1531

optimiz. of hardware multiplication by constant matrices. Boullis, N. , + , T-C Oct 20051271-1282

Optimization;
see Genetic algorithms
Optimization methods

aggregate streaming data, optimal lexicographic shaping. Anastasiadis, S.V., + , T-C Apr 05398-408

cantor vs. Harley. Wollinger, T., + , T-C Jul 05861-872

Optimizing compilers

software Trace Cache. Ramirez, A., + , T-C Jan 200522-35

P
Packet radio networks;
see Ad hoc networks
Packet switching

inspection computers, preventing session table explosion. Hyogon Kim, + , T-C Feb 2005238-240

Paged memories

EaseCAM, energy and storage efficient TCAM-based router archit. for IP lookup. Ravikumar, V.C., + , T-C May 05521-533

Parallel architectures

code size reduction in heterogeneous-connectivity-based DSPs using instruction set extensions. Biswas, P., + , T-C Oct 20051216-1226

conflict miss reduction, embedded multimedia appls., cache conscious data layout organization. Kulkarni, C., + , T-C Jan 200576-81

energy-efficient banked register file, speculative control scheme. Tseng, J.H., + , T-C Jun 05741-751

enhancing memory-level parallelism via recovery-free value predict. Zhou, H., + , T-C Jul 05897-912

low energy VLIW embedded processors, clustered loop buffer organization. Jayapala, M., + , T-C Jun 05672-683

scaling up Atlas chip-multiprocessor. Sassone, P.G., + , T-C Jan 200582-87

SMT/CMP throughput, area and syst. clock effects. Burns, J., + , T-C Feb 2005141-152

software Trace Cache. Ramirez, A., + , T-C Jan 200522-35

special classes of GF(2m), low-complexity bit-parallel systolic Montgomery multipliers. Chiou-Yng Lee, + , T-C Sep 051061-1070

vector/SIMD multiply-accumulate unit, archit. and implement. Danysh, A., + , T-C Mar 05284-293

Parallel architectures;
see Systolic arrays
Parallel machines

low energy VLIW embedded processors, clustered loop buffer organization. Jayapala, M., + , T-C Jun 05672-683

Parallel processing

low complexity bit-parallel multipliers. Chang, K.-Y., + , T-C Dec 20051628-1630

Parallel processing;
see Parallel architectures; Parallel machines
Pattern classification

B-tree dyn. router-table design. Lu, H., + , T-C Jul 05813-824

Pattern matching

LZW compress. files, pattern matching. Tao, T., + , T-C Aug 2005929-938

Pattern matching;
see String matching
Pattern recognition;
see Pattern classification; Pattern matching
Peak detectors

diagnosis of multiple hold-time and setup-time faults in scan chains. Li, J.C.-M., T-C Nov 20051467-1472

Performance analysis

VPC trace-compression algorithms. Burtscher, M., + , T-C Nov 20051329-1344

Performance evaluation

analysis of the performance impact of wrong-path memory references on out-of-order and runahead execution processors. Mutlu, O., + , T-C Dec 20051556-1571

bounded-latency content distrib. feasibility and eval. Huang, C., + , T-C Nov 20051422-1437

energy efficient computing (special section). T-C Jun 05641-766

energy efficient computing (special section intro.). Mudge, T., T-C Jun 05641

improving computer archit. simul. methodology by adding stat. rigor. Yi, J.J., + , T-C Nov 20051360-1373

optimizing hardware function evaluation. Lee, D., + , T-C Dec 20051520-1531

Periodic structures

design and properties of a new pseudorandom generator based on a filtered FCSR automaton. Arnault, F., + , T-C Nov 20051374-1383

Phased array radar

component-oriented phased array radars, real-time dwell sched. Tei-Wei Kuo, + , T-C Jan 200547-60

Pipeline processing

coarse-grain phased logic CPU. Reese, R.B., + , T-C Jul 05788-799

energy-efficient banked register file, speculative control scheme. Tseng, J.H., + , T-C Jun 05741-751

SMT/CMP throughput, area and syst. clock effects. Burns, J., + , T-C Feb 2005141-152

software Trace Cache. Ramirez, A., + , T-C Jan 200522-35

Polynomials

5, 6, 7-term Karatsuba-like formulas. Montgomery, P.L., T-C Mar 05362-369

error-detect. codes, algms. and fast implement. Nguyen, G.D., T-C Jan 20051-11

special classes of GF(2m), low-complexity bit-parallel systolic Montgomery multipliers. Chiou-Yng Lee, + , T-C Sep 051061-1070

trinomials, fast bit-parallel GF(2n) multiplier. Haining Fan, + , T-C Apr 05485-490

Power demand

dyn. task-level voltage sched. optimizations. Barnett, J.A., T-C May 05508-520

energy efficient instruction set synthesis framework for low power embedded syst. designs. Cheng, A.C., + , T-C Jun 05698-713

floating-point multimedia appls., fuzzy memoization. Alvarez, C., + , T-C Jul 05922-927

hierarchical adaptive dyn. power mgt. Ren, Z., + , T-C Apr 05409-420

motion estim., hardware/software realizations, power and perform. anal. Yang, S., + , T-C Jun 05714-726

power-aware storage cache mgt. Zhu, Q., + , T-C May 05587-602

reduce spill code, low-power processor, partitioning variables across register windows. Ravindran, R.A., + , T-C Aug 2005998-1012

single-chip heterog. multiprocessors, power-perform. simul. and design strategies. Meyer, B.H., + , T-C Jun 05684-697

Power distribution;
see Distribution networks
Prediction theory

VPC trace-compression algorithms. Burtscher, M., + , T-C Nov 20051329-1344

Probability

dyn. task-level voltage sched. optimizations. Barnett, J.A., T-C May 05508-520

energy aware comput., probabilistic switching, study of limits. Palem, K.V., T-C Sep 051123-1137

Processor scheduling

component-oriented phased array radars, real-time dwell sched. Tei-Wei Kuo, + , T-C Jan 200547-60

correction to "Efficient reclaiming in reservation-based real-time systems with variable execution times" (Feb 05 198-213). Caccamo, M., + , T-C Jun 05783

dyn. task-level voltage sched. optimizations. Barnett, J.A., T-C May 05508-520

reservation-based real-time systs., variable execution times, efficient reclaiming. Caccamo, M., + , T-C Feb 2005198-213

Program compilers

clustered worst-case execution-time calc. Ermedahl, A., + , T-C Sep 051104-1122

parameterized loop nests for direct mapped data cache, line size adaptivity anal. D'Alberto, P., + , T-C Feb 2005185-197

reduce spill code, low-power processor, partitioning variables across register windows. Ravindran, R.A., + , T-C Aug 2005998-1012

Program compilers;
see Optimizing compilers
Program control structures

parameterized loop nests for direct mapped data cache, line size adaptivity anal. D'Alberto, P., + , T-C Feb 2005185-197

Program debugging

Synchro-tokens, deterministic GALS methodology for chip-level debug and test. Heath, M.W., + , T-C Dec 20051532-1546

Programmable logic arrays;
see Field programmable gate arrays
Programming;
see Program control structures
Program processors

analysis of the performance impact of wrong-path memory references on out-of-order and runahead execution processors. Mutlu, O., + , T-C Dec 20051556-1571

improving computer archit. simul. methodology by adding stat. rigor. Yi, J.J., + , T-C Nov 20051360-1373

Program processors;
see Program compilers
Project engineering;
see Scheduling
Protocols

fault-tolerant protocol for energy-efficient permutation routing in wireless networks. Datta, A., T-C Nov 20051409-1421

order incremental CRC comput., out. Satran, J., + , T-C Sep 051178-1181

sens. nets., optimized broadcast protocol. Durresi, A., + , T-C Aug 20051013-1024

Protocols;
see Access protocols; Memory protocols; Transport protocols
Public key cryptography

cantor vs. Harley. Wollinger, T., + , T-C Jul 05861-872

hardware/software normal basis arith. for pairing-based cryptography, charact. 3. Granger, R., + , T-C Jul 05852-860

modular multiplication/division, hardware algm. Kaihara, M.E., + , T-C Jan 200512-21

pair of integers, left-to-right optimal signed-binary representation. Ruan, X., + , T-C Feb 2005124-131

tree parity machine rekeying archits. Volkmer, M., + , T-C Apr 05421-427

Pulse circuits;
see Digital circuits; Logic circuits
Q
Quality of service

granularity metric for fine-grain real-time scheduling. Palis, M.A., T-C Dec 20051572-1583

Queuing analysis

proportional slowdown differentiation, Internet servers, robust proc. rate allocation. Wei, J., + , T-C Aug 2005964-977

R
Radar;
see Phased array radar; Radar signal processing; Radar tracking; Search radar
Radar signal processing

component-oriented phased array radars, real-time dwell sched. Tei-Wei Kuo, + , T-C Jan 200547-60

Radar tracking

component-oriented phased array radars, real-time dwell sched. Tei-Wei Kuo, + , T-C Jan 200547-60

RAID

MDS array codes for RAID, Rabin-like codes for tolerating multiple disk failures. Feng, G.-L., + , T-C Dec 20051473-1483

Random functions

aliasing probability calculations for arbitrary compaction under independently selected random test vectors. Hadjicostis, C.N., T-C Dec 20051614-1627

Randomized algorithms;
see Genetic algorithms
Random number generation

design and properties of a new pseudorandom generator based on a filtered FCSR automaton. Arnault, F., + , T-C Nov 20051374-1383

Real time systems

algm.-specific tasks, GAARP, power-aware GALS archit. Swarup Bhunia, + , T-C Jun 05752-766

clustered worst-case execution-time calc. Ermedahl, A., + , T-C Sep 051104-1122

component-oriented phased array radars, real-time dwell sched. Tei-Wei Kuo, + , T-C Jan 200547-60

correction to "Efficient reclaiming in reservation-based real-time systems with variable execution times" (Feb 05 198-213). Caccamo, M., + , T-C Jun 05783

exact stochastic analysis of priority-driven periodic real-time systems and its approx. Kim, K., + , T-C Nov 20051460-1466

granularity metric for fine-grain real-time scheduling. Palis, M.A., T-C Dec 20051572-1583

reservation-based real-time systs., variable execution times, efficient reclaiming. Caccamo, M., + , T-C Feb 2005198-213

supporting demanding hard-real-time systems with STI. Welch, B., + , T-C Oct 20051188-1202

systs. support for preemptive disk schedul. Dimitrijevic, Z., + , T-C Oct 20051314-1326

utility accrual sched. algms., real-time distrib. systs., time/utility fn. decomp. techs. Haisang Wu, + , T-C Sep 051138-1153

Real-time systems;
see Embedded systems
Reconfigurable architectures

energy efficient instruction set synthesis framework for low power embedded syst. designs. Cheng, A.C., + , T-C Jun 05698-713

Reduced instruction set computing

conflict miss reduction, embedded multimedia appls., cache conscious data layout organization. Kulkarni, C., + , T-C Jan 200576-81

embedded processors, software-based self-testing. Kranitis, N., + , T-C Apr 05461-475

low energy VLIW embedded processors, clustered loop buffer organization. Jayapala, M., + , T-C Jun 05672-683

Redundant number systems

modular multiplication/division, hardware algm. Kaihara, M.E., + , T-C Jan 200512-21

Reed-Solomon codes

RAID., efficient MDS array codes, I. Feng, G.-L., + , T-C Sep 051071-1080

Reliability

joint reliability of medium access control and radio link protocol in 3G CDMA systems. Chatterjee, M., + , T-C Dec 20051584-1597

Reliability;
see Fault tolerance
Residue arithmetic

efficient diminished-1 modulo 2n + 1 multipliers. Efstathiou, C., + , T-C Apr 05491-496

Resource allocation

correction to "Efficient reclaiming in reservation-based real-time systems with variable execution times" (Feb 05 198-213). Caccamo, M., + , T-C Jun 05783

Resource management

distrib. inform. monitoring appls., scalable peer-to-peer archit. Gedik, B., + , T-C Jun 05767-782

dyn. task-level voltage sched. optimizations. Barnett, J.A., T-C May 05508-520

proportional slowdown differentiation, Internet servers, robust proc. rate allocation. Wei, J., + , T-C Aug 2005964-977

reservation-based real-time systs., variable execution times, efficient reclaiming. Caccamo, M., + , T-C Feb 2005198-213

utility accrual sched. algms., real-time distrib. systs., time/utility fn. decomp. techs. Haisang Wu, + , T-C Sep 051138-1153

Routing

KR-Benes net., control-optimal rearrangeable permutation net. Rajgopal Kannan, T-C May 05534-544

S
Satellite computers;
see Coprocessors
Scheduling

common comput.-dags for Internet-based comput., guidelines. Rosenberg, A.L., + , T-C Apr 05428-438

FIFO-based multicast schedul. algorithm for virtual output queued packet switches. Pan, D., + , T-C Oct 20051283-1297

granularity metric for fine-grain real-time scheduling. Palis, M.A., T-C Dec 20051572-1583

integrated ILP-based test scheduling environment. Chin, J., + , T-C Dec 20051598-1613

minimizing energy consumption of VLSI processors, multiple supply voltages, genetic approach. Hariyama, M., + , T-C Jun 05642-650

multiple channels, flat broadcast per channel, optimal skewed data allocation. Ardizzoni, E., + , T-C May 05558-572

systs. support for preemptive disk schedul. Dimitrijevic, Z., + , T-C Oct 20051314-1326

utility accrual sched. algms., real-time distrib. systs., time/utility fn. decomp. techs. Haisang Wu, + , T-C Sep 051138-1153

Scheduling;
see Processor scheduling
Search methods

minimizing energy consumption of VLSI processors, multiple supply voltages, genetic approach. Hariyama, M., + , T-C Jun 05642-650

motion estim., hardware/software realizations, power and perform. anal. Yang, S., + , T-C Jun 05714-726

on-chip IP address lookup algm. Sun, X., + , T-C Jul 05873-885

Search problems;
see Tree searching
Search radar

component-oriented phased array radars, real-time dwell sched. Tei-Wei Kuo, + , T-C Jan 200547-60

Security of data;
see Authorization; Computer crime; Cryptography
Self-testing

embedded processors, software-based self-testing. Kranitis, N., + , T-C Apr 05461-475

low cost and high speed embedded 2-rail code checker. Omana, M., + , T-C Feb 2005153-164

optimal deterministic partitionings, scan-based BIST fault diagnosis, constr. Bayraktaroglu, I., + , T-C Jan 200561-75

test vector embedding, accumulator-generated seqs. Voyiatzis, I., T-C Apr 05476-484

Sensors;
see Microsensors
Set theory

bound-set preserving ROBDD variable orderings, not, optimum. Teslenko, M., + , T-C Feb 2005236-237

Shift registers

design and properties of a new pseudorandom generator based on a filtered FCSR automaton. Arnault, F., + , T-C Nov 20051374-1383

modular multiplication/division, hardware algm. Kaihara, M.E., + , T-C Jan 200512-21

parallel decoding cyclic burst error correcting codes. Umanesan, G., + , T-C Jan 200587-92

Signal processing;
see Data compression; Digital signal processing chips; Radar signal processing
Silicon

charge-recovery comput. Suhwan Kim, + , T-C Jun 05651-659

Simulation

improving computer archit. simul. methodology by adding stat. rigor. Yi, J.J., + , T-C Nov 20051360-1373

Simulation;
see Circuit simulation
Software fault diagnosis

clustered worst-case execution-time calc. Ermedahl, A., + , T-C Sep 051104-1122

parameterized loop nests for direct mapped data cache, line size adaptivity anal. D'Alberto, P., + , T-C Feb 2005185-197

Software packages

automated custom instruction generation for domain-specific processor acceleration. Clark, N.T., + , T-C Oct 20051258-1270

Software performance

Trace Cache. Ramirez, A., + , T-C Jan 200522-35

Software requirements and specifications

partial deterministic FSM specs., testing. Petrenko, A., + , T-C Sep 051154-1165

Software testing

partial deterministic FSM specs., testing. Petrenko, A., + , T-C Sep 051154-1165

Sorting

BWT-based data compress., antisequential suffix sorting. Baron, D., + , T-C Apr 05385-397

data compress., universal text preprocessing. Abel, J., + , T-C May 05497-507

Space-time configurations

causality-based predicate detection across space and time. Chandra, P., + , T-C Nov 20051438-1453

Special issues and sections

computer arithmetic (special issue). T-C Mar 05241-380

computer arithmetic (special issue intro.). Schulte, M.J., + , T-C Mar 05241-242

energy efficient computing (special section). T-C Jun 05641-766

energy efficient computing (special section intro.). Mudge, T., T-C Jun 05641

tribute to B. Ramakrishna (special issue). T-C Oct 20051185-1270

tribute to B. Ramakrishna (special issue intro.). Hwu, W.-M.W., + , T-C Oct 20051185-1187

Standards;
see IEEE standards
Statistics;
see Game theory
Stochastic logic

energy aware comput., probabilistic switching, study of limits. Palem, K.V., T-C Sep 051123-1137

Stochastic processes

exact stochastic analysis of priority-driven periodic real-time systems and its approx. Kim, K., + , T-C Nov 20051460-1466

Stochastic processes;
see Markov processes
Storage allocation

lattice-based memory allocation. Darte, A., + , T-C Oct 20051242-1257

Storage management;
see Buffer storage; Memory protocols; Virtual storage
Storage media;
see Hard disks
String matching

B-tree dyn. router-table design. Lu, H., + , T-C Jul 05813-824

prefix and interval-partitioned dyn. IP router-tables. Haibin Lu, + , T-C May 05545-557

Surveillance

component-oriented phased array radars, real-time dwell sched. Tei-Wei Kuo, + , T-C Jan 200547-60

Switching circuits

Si, charge-recovery comput. Suhwan Kim, + , T-C Jun 05651-659

Switching circuits;
see Logic circuits
Synchronization

Synchro-tokens, deterministic GALS methodology for chip-level debug and test. Heath, M.W., + , T-C Dec 20051532-1546

System-on-chip

Synchro-tokens, deterministic GALS methodology for chip-level debug and test. Heath, M.W., + , T-C Dec 20051532-1546

Systems software

distributed data cache designs for clustered VLIW processors. Gibert, E., + , T-C Oct 20051227-1241

Systems software;
see Operating systems (computers); Program processors; Utility programs
Systolic arrays

unidirectional bit serial systolic archits. for multiplicative inversion and division, GF(2m), class. Daneshbeh, A.K., + , T-C Mar 05370-380

T
Table lookup

binary-to-multidigit multidimensional logarithmic no. syst. conversion, range-addressable look-up tables, efficient techs. Muscedere, R., + , T-C Mar 05257-271

B-tree dyn. router-table design. Lu, H., + , T-C Jul 05813-824

EaseCAM, energy and storage efficient TCAM-based router archit. for IP lookup. Ravikumar, V.C., + , T-C May 05521-533

high-speed fn. approx., minimax quadratic interpolator. Pineiro, J.-A., + , T-C Mar 05304-318

multipartite table methods. de Dinechin, F., + , T-C Mar 05319-330

on-chip IP address lookup algm. Sun, X., + , T-C Jul 05873-885

packet inspection computers, preventing session table explosion. Hyogon Kim, + , T-C Feb 2005238-240

prefix and interval-partitioned dyn. IP router-tables. Haibin Lu, + , T-C May 05545-557

Telecommunication;
see Bandwidth allocation; Mobile communication; Multicast communication
Telecommunication network management;
see Computer network management
Telecommunication network reliability;
see Computer network reliability
Telecommunication networks;
see Computer networks
Telecommunication services;
see Quality of service
Telecommunication switching;
see Multiplexing
Test equipment;
see Automatic test equipment
Testing

aliasing probability calculations for arbitrary compaction under independently selected random test vectors. Hadjicostis, C.N., T-C Dec 20051614-1627

integrated ILP-based test scheduling environment. Chin, J., + , T-C Dec 20051598-1613

Synchro-tokens, deterministic GALS methodology for chip-level debug and test. Heath, M.W., + , T-C Dec 20051532-1546

Testing;
see Automatic testing; Boundary scan testing
Time division multiplexing;
see Packet switching
Topology;
see Graph theory
Tracking;
see Radar tracking
Traffic control (communication)

adaptive connection establishment, improv. unstructured peer-to-peer systs. Xiao, L., + , T-C Sep 051091-1103

fault-tolerant distrib. channel allocation scheme for cellular nets. Yang, J., + , T-C May 05616-629

location-aided flooding. Sabbineni, H., + , T-C Jan 200536-46

Transforms

BWT-based data compress., antisequential suffix sorting. Baron, D., + , T-C Apr 05385-397

Transistors

instruction replication for reducing delays due to inter-PE communication latency. Aggarwal, A., + , T-C Dec 20051496-1507

replication cache, small fully associative cache to improve data cache reliability. Zhang, W., T-C Dec 20051547-1555

Transport protocols

location-aided flooding. Sabbineni, H., + , T-C Jan 200536-46

packet inspection computers, preventing session table explosion. Hyogon Kim, + , T-C Feb 2005238-240

Tree data structures

B-tree dyn. router-table design. Lu, H., + , T-C Jul 05813-824

efficient diminished-1 modulo 2n + 1 multipliers. Efstathiou, C., + , T-C Apr 05491-496

on-chip IP address lookup algm. Sun, X., + , T-C Jul 05873-885

sched., common comput.-dags for Internet-based comput., guidelines. Rosenberg, A.L., + , T-C Apr 05428-438

secure multicast key mgt., high-order tree. Lu, H., T-C Feb 2005214-224

software Trace Cache. Ramirez, A., + , T-C Jan 200522-35

Tree searching

prefix and interval-partitioned dyn. IP router-tables. Haibin Lu, + , T-C May 05545-557

Trees (graphs)

adaptive connection establishment, improv. unstructured peer-to-peer systs. Xiao, L., + , T-C Sep 051091-1103

wireless nets., max. lifetime broadcasting. Park, J., + , T-C Sep 051081-1090

U
Utility programs

accrual sched. algms., real-time distrib. systs., time/utility fn. decomp. techs. Haisang Wu, + , T-C Sep 051138-1153

V
Vector processing

strided vectors, banked cache, conflict-free accesses. Seznec, A., + , T-C Jul 05913-916

Very-large-scale integration

arith. coding, compress. of VLSI test data. Hashempour, H., + , T-C Sep 051166-1177

BWT-based data compress., antisequential suffix sorting. Baron, D., + , T-C Apr 05385-397

efficient diminished-1 modulo 2n + 1 multipliers. Efstathiou, C., + , T-C Apr 05491-496

high-perform. low-power left-to-right array multiplier design. Zhijun Huang, + , T-C Mar 05272-283

high-speed parallel-prefix VLSI Ling adders. Dimitrakopoulos, G., + , T-C Feb 2005225-231

minimizing energy consumption of VLSI processors, multiple supply voltages, genetic approach. Hariyama, M., + , T-C Jun 05642-650

modular multiplication/division, hardware algm. Kaihara, M.E., + , T-C Jan 200512-21

motion estim., hardware/software realizations, power and perform. anal. Yang, S., + , T-C Jun 05714-726

Si, charge-recovery comput. Suhwan Kim, + , T-C Jun 05651-659

SMT/CMP throughput, area and syst. clock effects. Burns, J., + , T-C Feb 2005141-152

test vector embedding, accumulator-generated seqs. Voyiatzis, I., T-C Apr 05476-484

Video coding

motion estim., hardware/software realizations, power and perform. anal. Yang, S., + , T-C Jun 05714-726

Video signal processing;
see Video coding
Virtual storage

FIFO-based multicast schedul. algorithm for virtual output queued packet switches. Pan, D., + , T-C Oct 20051283-1297

W
Wireless sensor networks

fault-tolerant protocol for energy-efficient permutation routing in wireless networks. Datta, A., T-C Nov 20051409-1421

 
 
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