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Issue No.12 - December (2005 vol.54)
pp: 1614-1627
ABSTRACT
This paper discusses a systematic methodology for calculating the exact aliasing probability associated with schemes that use an arbitrary finite-state machine to compact the response of a combinational circuit to a sequence of independently selected, random test input vectors. The proposed approach identifies the strong influence of fault activation probabilities on the probability of aliasing and uses an asymmetric error model to simultaneously track the states of two (fictitious) compactors, one driven by the response of the fault-free combinational circuit and one driven by the response of the faulty combinational circuit. By deriving the overall Markov chain that describes the combined behavior of these two compactors, we are able to calculate the exact aliasing probability for any test sequence length. In particular, for long enough sequences, the probability of aliasing is shown to only depend on the stationary distribution of the Markov chain. The insights provided by our analysis are used to evaluate the testing performance of simple examples of nonlinear compactors and to demonstrate regimes where they exhibit lower aliasing probability than linear compactors with the same number of states. Finally, by establishing connections with previous work that evaluated aliasing probability in linear compactors, our analysis clarifies the role played by the entropy of the stationary distribution of the compactor states.
INDEX TERMS
Index Terms- Aliasing probability, compaction, fault activation probabilities, random testing.
CITATION
Christoforos N. Hadjicostis, "Aliasing Probability Calculations for Arbitrary Compaction under Independently Selected Random Test Vectors", IEEE Transactions on Computers, vol.54, no. 12, pp. 1614-1627, December 2005, doi:10.1109/TC.2005.189
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