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Bibliographic References
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IEEE Transactions on Computers
December 2005 (vol. 54 no. 12)
ISSN: 0018-9340
Table of Contents
Papers
New Efficient MDS Array Codes for RAID Part II: Rabin-Like Codes for Tolerating Multiple (greater than or equal to 4) Disk Failures
(Abstract)
Gui-Liang Feng
, IEEE
Robert H. Deng
Feng Bao
Jia-Chen Shen
pp. 1473-1483
ABSTRACT
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Energy Scalable Universal Hashing
(Abstract)
Jens-Peter Kaps
, IEEE
Kaan Y?
, IEEE
Berk Sunar
, IEEE
pp. 1484-1495
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Instruction Replication for Reducing Delays Due to Inter-PE Communication Latency
(Abstract)
Aneesh Aggarwal
, IEEE Computer Society
Manoj Franklin
, IEEE Computer Society
pp. 1496-1507
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A Carry-Free Architecture for Montgomery Inversion
(Abstract)
Erkay Savas
, IEEE
pp. 1508-1519
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Optimizing Hardware Function Evaluation
(Abstract)
Dong-U Lee
, IEEE
Altaf Abdul Gaffar
, IEEE
Oskar Mencer
, IEEE
Wayne Luk
, IEEE
pp. 1520-1531
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Synchro-Tokens: A Deterministic GALS Methodology for Chip-Level Debug and Test
(Abstract)
Matthew W. Heath
, IEEE
Wayne P. Burleson
, IEEE
Ian G. Harris
, IEEE
pp. 1532-1546
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Replication Cache: A Small Fully Associative Cache to Improve Data Cache Reliability
(Abstract)
Wei Zhang
, IEEE
pp. 1547-1555
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An Analysis of the Performance Impact of Wrong-Path Memory References on Out-of-Order and Runahead Execution Processors
(Abstract)
Onur Mutlu
, IEEE
Hyesoon Kim
, IEEE
David N. Armstrong
Yale N. Patt
, IEEE
pp. 1556-1571
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The Granularity Metric for Fine-Grain Real-Time Scheduling
(Abstract)
Michael A. Palis
, IEEE
pp. 1572-1583
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Joint Reliability of Medium Access Control and Radio Link Protocol in 3G CDMA Systems
(Abstract)
Mainak Chatterjee
Giridhar D. Mandyam
, IEEE
Sajal K. Das
, IEEE
pp. 1584-1597
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FITS: An Integrated ILP-Based Test Scheduling Environment
(Abstract)
James Chin
, IEEE
Mehrdad Nourani
, IEEE
pp. 1598-1613
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Web Extra: View
supplemental material
Aliasing Probability Calculations for Arbitrary Compaction under Independently Selected Random Test Vectors
(Abstract)
Christoforos N. Hadjicostis
, IEEE
pp. 1614-1627
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Brief Contributions
Low Complexity Bit-Parallel Multiplier for GF(2^m) Defined by All-One Polynomials Using Redundant Representation
(Abstract)
Ku-Young Chang
Dowon Hong
Hyun-Sook Cho
pp. 1628-1630
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Annual Index
2005 Annual Index
(HTML)
pp. 1631-1648
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