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An On-Chip IP Address Lookup Algorithm
July 2005 (vol. 54 no. 7)
pp. 873-885
This paper proposes a new data compression algorithm to store the routing table in a tree structure using very little memory. This data structure is tailored to a hardware design reference model presented in this paper. By exploiting the low memory access latency and high bandwidth of on-chip memory, high-speed packet forwarding can be achieved using this data structure. With the addition of pipeline in the hardware, IP address lookup can only be limited by the memory access speed. The algorithm is also flexible for different implementation. Experimental analysis shows that, given the memory width of 144 bits, our algorithm needs only 400kb memory for storing a 20k entries IPv4 routing table and five memory accesses for a search. For a 1M entries IPv4 routing table, 9Mb memory and seven memory accesses are needed. With memory width of 1,068 bits, we estimate that we need 100Mb memory and six memory accesses for a routing table with 1M IPv6 prefixes.

[1] R. Bayer and E. McCreight, “Organization and Maintenance of Large Ordered Indexes,” Acta Informatica, vol. 1, no. 3, pp. 173-189, Sept. 1972.
[2] S. Deering and R. Hinden, “Internet Protocol, Version 6 (IPv6) Specification,” RFC 2460, Dec. 1998.
[3] M. Degermark, A. Brodnik, S. Carlsson, and S. Pink, “Small Forwarding Tables for Fast Routing Lookups,” Proc. ACM SIGCOMM, pp. 3-14, Sept. 1997.
[4] P. van Emde Boas, R. Kaas, and E. Zijlstra, “Design and Implementation of an Efficient Priority Queue,” Math. Systems Theory, vol. 10, pp. 99-127, 1977.
[5] P. Gupta, S. Lin, and N. McKeown, “Routing Lookups in Hardware at Memory Access Speeds,” Proc. Infocom, Apr. 1998.
[6] R. Hinden and S. Deering, “Internet Protocol Version 6 (IPv6) Addressing Architecture,” RFC 3513, Apr. 2003.
[7] S. Nilsson and G. Karlsson, “IP Address Lookup Using LC-Tries,” IEEE J. Selected Areas in Comm., vol. 17, no. 6, pp. 1083-1092, June 1999.
[8] N.-F. Huang and S.-M. Zhao, “A Novel IP-Routing Lookup Scheme and Hardware Architecture for Multigigabit Switching Routers,” IEEE J. Selected Areas in Comm., vol. 17, no. 6, pp. 1093-1104, June 1999.
[9] B. Lampson, V. Srinivasan, and G. Varghese, “IP Lookups Using Multiway and Multicolumn Search,” IEEE/ACM Trans. Networking, vol. 7, pp. 324-334, 1999.
[10] H. Lu and S. Sahni, “O(log n) Dynamic Router-Tables for Ranges,” Proc. IEEE Symp. Computers and Comm., pp. 91-96, 2003.
[11] R. Ramaswami and K.N. Sivarajan, Optical Networks: A Practical Perspective. San Francisco: Morgan Kaufmann, 1998.
[12] Y. Rekhter and T. Li, “An Architecture for IP Address Allocation with CIDR,” RFC 1518, Sept. 1993.
[13] M.A. Ruiz-Sanchez, E.W. Biersack, and W. Dabbous, “Survey and Taxonomy of IP Address Lookup Algorithms,” IEEE Network, vol. 15, no. 2, pp. 8-23, Mar./Apr. 2001.
[14] S. Sahni, K. Kim, and H. Lu, “Data Structures for One-Dimensional Packet Classification Using Most-Specific-Rule Matching,” Int'l J. Foundations of Computer Science, vol. 14, no. 3, pp. 337-358, 2003.
[15] K. Seppanen, “Novel IP Address Lookup Algorithm for Inexpensive Hardware Implementation,” WSEAS Trans. Comm., vol. 1, no. 1, pp. 76-84, 2002.
[16] S. Suri, G. Varghese, and P. Warkhede, “Multiway Range Trees: Scalable IP Lookup with Fast Updates,” Proc. GLOBECOM, 2001.
[17] M. Waldvogel, G. Varghese, J. Turner, and B. Plattner, “Scalable High Speed IP Routing Lookups,” Proc. ACM SIGCOMM, pp. 25-36, Sept. 1997.
[18] http:/, 2003.
[19] products ememory.html, 2003.
[20] http:/, 2005.
[21], 2003.
[22], 2005.
[23] http://www.npforum.orgorg/, 2005.

Index Terms:
Index Terms- Algorithms, hardware, tree data structures, range search, IP address lookup, on-chip memory.
Xuehong Sun, Yiqiang Q. Zhao, "An On-Chip IP Address Lookup Algorithm," IEEE Transactions on Computers, vol. 54, no. 7, pp. 873-885, July 2005, doi:10.1109/TC.2005.107
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