
This Article  
 
Share  
Bibliographic References  
Add to:  
Digg Furl Spurl Blink Simpy Del.icio.us Y!MyWeb  
Search  
 
ASCII Text  x  
Jeffrey A. Barnett, "Dynamic TaskLevel Voltage Scheduling Optimizations," IEEE Transactions on Computers, vol. 54, no. 5, pp. 508520, May, 2005.  
BibTex  x  
@article{ 10.1109/TC.2005.77, author = {Jeffrey A. Barnett}, title = {Dynamic TaskLevel Voltage Scheduling Optimizations}, journal ={IEEE Transactions on Computers}, volume = {54}, number = {5}, issn = {00189340}, year = {2005}, pages = {508520}, doi = {http://doi.ieeecomputersociety.org/10.1109/TC.2005.77}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }  
RefWorks Procite/RefMan/Endnote  x  
TY  JOUR JO  IEEE Transactions on Computers TI  Dynamic TaskLevel Voltage Scheduling Optimizations IS  5 SN  00189340 SP508 EP520 EPD  508520 A1  Jeffrey A. Barnett, PY  2005 KW  Energyaware systems KW  energy management KW  time management KW  dynamic voltage scheduling KW  agile voltage scheduling KW  power management points. VL  54 JA  IEEE Transactions on Computers ER   
[1] Advanced Micro Devices Corp., http:/www.amd.com, Mar. 2004.
[2] AeroVironment Corp., http:/www.aerovironment.com, Mar. 2004.
[3] H. Aydin, R. Melhem, D. Mossé, and P. MejíaAlvarez, “Determining Optimal Processor Speeds for Periodic RealTime Tasks with Different Power Characteristics,” Proc. Euromicro Conf. RealTime Systems, pp. 225232, 2001.
[4] H. Aydin, R. Melhem, D. Mossé, and P. MejíaAlvarez, “Optimal RewardBased Scheduling for Periodic RealTime Tasks,” IEEE Trans. Computers, vol. 50, no. 2, pp. 111130, Feb. 2001.
[5] J. Barnett, “ApplicationLevel Power Awareness,” Power Aware Computing, R. Graybill and R. Melhem, eds., pp. 227242, Kluwer, 2002.
[6] J. Barnett, “How Much Is Control Knowledge Worth? A Primitive Example,” Artificial Intelligence, vol. 22, no. 1, pp. 7789, 1984.
[7] K. Blazewicz, E. Ecker, E. Pesch, G. Schmidt, and J. Weglarz, Scheduling Computer and Manufacturing Processes, pp. 346350, Berlin: SpringerVerlag, 1996.
[8] B. Bohem, E. Horowitz, R. Madachy, D. Reifer, B. Clark, B. Steece, A. Brown, S. Chulain, and C. Abts, Software Cost Estimates with COCOMO II. Prentice Hall, 2000.
[9] R. Buck, Advanced Calculus, pp. 296298, 375385. McGrawHill, 1956.
[10] T. Burd and R. Brodersen, “Energy Efficient CMOS Microprocessor Design,” Proc. Hawaii Int'l Conf. System Sciences (HICSS), pp. 288297, 1995.
[11] T. Burd, T. Pering, A. Statakos, and R. Brodersen, “A Dynamic Voltage Scaled Microprocessor Systems,” IEEE J. SolidState Circuits, vol. 35, no. 11, pp. 15711580, 2000.
[12] G. Cao, “Proactive PowerAware Cache Management for Mobile Computing,” IEEE Trans. Computers, vol. 51, no. 6, pp. 608621, June 2002.
[13] A. Chandrakasan, V. Gutnik, and T. Xanthopoulos, “Data Driven Signal Processing: An Approach for Energy Efficient Computing,” Proc. Int'l Symp. Low Power Electronics and Design, pp. 347352, 1996.
[14] A. Chandrakasan, S. Sheng, and R. Brodersen, “LowPower CMOS Digital Design,” IEEE J. SolidState Circuits, vol. 27, no. 4, pp. 473484, 1992.
[15] D. Gillies and W. Liu, “Scheduling Tasks with AND/OR Precedence Constraints,” SIAM J. Computing, vol. 24, no. 4, pp. 797810, 1995.
[16] F. Gruian, “Hard RealTime Scheduling for LowEnergy Using Stochastic Data and DVS Processors,” Proc. Int'l Symp. Low Power Electronics and Design, pp. 4651, 2001.
[17] F. Gruian, “On Energy Reduction in Hard RealTime Systems Containing Tasks with Stochastic Execution Times,” Proc. IEEE Workshop RealTime Embedded Systems, pp. 1116, 2001.
[18] V. Gutnik and A. Chandrakasan, “An Efficient Controller for Variable Supply Voltage Low Power Processing,” Proc. Symp. VLSI Circuits, pp. 158159, 1996.
[19] G. Hardy, J. Littlewood, and G. Pólya, Inequalities. Cambridge Univ. Press, 1988.
[20] M. Igarashi, K. Usami, K. Nogami, F. Minami, Y. Kawasaki, T. Aoki, M. Takano, C. Mizuno, T. Ishikawa, M. Kanazawa, S. Sonoda, M. Ichida, and N. Hatanaka, “A LowPower Design Method Using Multiple Supply Voltages,” Proc. Int'l Symp. Low Power Electronics and Design, pp. 3641, 1997.
[21] Intel Corp., http://developer.intel.com/designintelxscale , Mar. 2004.
[22] Intel, Microsoft, and Toshiba, Advanced Configuration and Power Management Interface (ACPI) Specification, http:/www.acpi.info, Mar. 2004.
[23] Int'l Business Machines, http:/www.ibm.com, Mar. 2004.
[24] T. Ishihara and H. Yasuura, “Voltage Scheduling Problems for Dynamically Variable Voltage Processors,” Proc. Int'l Symp. Low Power Electronics and Design, pp. 197202, 1998.
[25] J. Jalminger and P. Stenström, “Improvement of EnergyEfficiency in OffChip Caches by Selective Prefetching,” Microprocessors and Microsystems, vol. 26, no. 3, pp. 107121, 2002.
[26] P. Kumar and M. Srivastava, “Predictive Strategies for LowPower RTOS Scheduling,” Proc. IEEE Int'l Conf. Computer Design: VLSI in Computers and Processors, p. 343, 2000.
[27] S. Lee and T. Sakurai, “RunTime Voltage Hopping for LowPower RealTime Systems,” Proc. 37th Design Automation Conf., pp. 806809, 2000.
[28] D. Li, P. Chou, and N. Bagherzadeh, “Topology Selection for Energy Minimization in Embedded Networks,” Proc. Asia SouthPacific Design Automation Conf. (ASPDAC), pp. 693696, 2003.
[29] J. Lorch and A. Smith, “Improving Dynamic Voltage Scaling Algorithms with PACE,” Proc. ACM Sigmetrics, pp. 5061, 2001.
[30] A. Manzak and C. Chakrabarti, “Variable Voltage Task Scheduling Algorithms for Minimizing Energy,” Proc. Int'l Symp. Low Power Electronics and Design, pp. 279282, 2001.
[31] A. Martin, M. Nyström, and P. Pénzes, “$Et^2$ : A Metric for Time and Energy Efficiency of Computation,” Power Aware Computing, R. Graybill and R. Melhem, eds., pp. 293315, Kluwer, 2002.
[32] R. Melhem, N. AbouGhazaleh, and D. Mossé, “Power Management Points in PowerAware RealTime Systems,” Power Aware Computing, R. Graybill and R. Melhem, eds., pp. 127152, Kluwer, 2002.
[33] S. Mohanty, J. Ou, and V. Prasanna, “An Estimation and Simulation Framework for Energy Efficient Design Using Platform FPGAs,” Proc. IEEE Symp. FieldProgrammable Custom Computing Machines, p. 290, Apr. 2003.
[34] D. Mossé, H. Aydin, B. Childers, and R. Melhem, “CompilerAssisted Dynamic PowerAware Scheduling for Realtime Applications,” Proc. Workshop Compilers and Operating Systems for Low Power, Oct. 2000.
[35] W. Namgoang, M. Yu, and T. Meg, “A High Efficiency VariableVoltage CMOS Dynamic DCDC Switching Regulator,” Proc. IEEE Int'l SolidState Circuits Conf., pp. 380391, 1997.
[36] P. Pillai and K. Shin, “RealTime Dynamic Voltage Scaling for LowPower Embedded Operating Systems,” Proc. ACM Symp. Operating Systems Principles, pp. 89102, 2001.
[37] J. Pouwelse, K. Langendoen, and H. Sips, “Energy Priority Scheduling for Variable Voltage Processors,” Proc. Int'l Symp. Low Power Electronics and Design, pp. 2833, 2001.
[38] Q. Qiu and M. Pedram, “Dynamic Power Management Based on ContinuousTime Markov Decision Processes,” Proc. Design Automation Conf. 36, pp. 555561, 1999.
[39] V. Raghunathan, P. Spanos, and M. Srivastava, “Adaptive PowerFidelity in Energy Aware Wireless Embedded Systems,” Proc. IEEE RealTime Systems Symp., p. 106, 2001.
[40] T. Sakurai and A. Newton, “AlphaPower Law MOSFET Models and Its Applications to CMOS Inverter Delay and Other Formulas,” IEEE J. SolidState Circuits, vol. 25, no. 2, pp. 584594, 1990.
[41] D. Shin, J. Kim, and S. Lee, “IntraTask Voltage Scheduling for LowEnergy Hard RealTime Applications,” IEEE Design and Test of Computers, vol. 18, no. 2, pp. 2030, Mar./Apr. 2001.
[42] P. Shriver, M. Gokhale, S. Briles, D. Kang, M. Cai, K. McCabe, S. Crago, and J. Suh, “A PowerAware, SatelliteBased Parallel Signal Processing Scheme,” Power Aware Computing, R. Graybill and R. Melhem, eds., pp. 243259, Kluwer, 2002.
[43] K. Suzuki, S. Mita, T. Fujita, F. Yamane, F. Sano, A. Chiba, Y. Watanabe, K. Matsuda, T. Maeda, and T. Kuroda, “300MIPS/W RISC Core Processor with Variable Voltage SupplyVoltage Scheme in Variable ThresholdVoltage CMOS,” Proc. Int'l Computing Conf., pp. 587590, 1997.
[44] Transmeta Corp., http:/www.transmeta.com, Mar. 2004.
[45] P. Yang, C. Wong, P. Marchal, F. Catthoor, D. Desmet, D. Verkest, and R. Lauwereins, “EnergyAware Runtime Scheduling for EmbeddedMultiprocessor SOCs,” IEEE Design and Test of Computers, vol. 18, no. 5, pp. 4658, Sept./Oct. 2001.
[46] F. Yao, A. Demers, and S. Shenker, “A Scheduling Model for Reduced CPU Energy,” Proc. IEEE Ann. Symp. Foundations of Computer Science, pp. 374382, 1995.
[47] W. Ye, J. Heidemann, and D. Estrin, “An EnergyEfficient MAC Protocol for Wireless Sensor Networks,” Proc. IEEE INFOCOM, pp. 15671576, 2002.
[48] D. Zhu, D. Mossé, and R. Melhem, “Power Aware Scheduling for AND/OR Graphs in RealTime Systems,” IEEE Trans. Parallel and Distributed Systems, vol. 15, no. 9, pp. 849864, Sept. 2004.
[49] V. Zyuban and P. Kogge, “Inherently LowerPower HighPerformance Superscalar Architectures,” IEEE Trans. Computers, vol. 50, no. 3, pp. 268285, Mar. 2001.