Publication 2005 Issue No. 3 - March Abstract - A Class of Unidirectional Bit Serial Systolic Architectures for Multiplicative Inversion and Division over {\rm GF}(2^m)
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A Class of Unidirectional Bit Serial Systolic Architectures for Multiplicative Inversion and Division over {\rm GF}(2^m)
March 2005 (vol. 54 no. 3)
pp. 370-380
 ASCII Text x Amir K. Daneshbeh, M. Anwar Hasan, "A Class of Unidirectional Bit Serial Systolic Architectures for Multiplicative Inversion and Division over {\rm GF}(2^m)," IEEE Transactions on Computers, vol. 54, no. 3, pp. 370-380, March, 2005.
 BibTex x @article{ 10.1109/TC.2005.35,author = {Amir K. Daneshbeh and M. Anwar Hasan},title = {A Class of Unidirectional Bit Serial Systolic Architectures for Multiplicative Inversion and Division over {\rm GF}(2^m)},journal ={IEEE Transactions on Computers},volume = {54},number = {3},issn = {0018-9340},year = {2005},pages = {370-380},doi = {http://doi.ieeecomputersociety.org/10.1109/TC.2005.35},publisher = {IEEE Computer Society},address = {Los Alamitos, CA, USA},}
 RefWorks Procite/RefMan/Endnote x TY - JOURJO - IEEE Transactions on ComputersTI - A Class of Unidirectional Bit Serial Systolic Architectures for Multiplicative Inversion and Division over {\rm GF}(2^m)IS - 3SN - 0018-9340SP370EP380EPD - 370-380A1 - Amir K. Daneshbeh, A1 - M. Anwar Hasan, PY - 2005KW - DivisionKW - extended Euclidean algorithmKW - finite fieldsKW - field arithmeticKW - inversionKW - systolic arrays.VL - 54JA - IEEE Transactions on ComputersER -
A class of universal unidirectional bit serial systolic architectures for multiplicative inversion and division over Galois field {\rm GF}(2^m) is presented. The field elements are represented with polynomial (standard) basis. These systolic architectures have no carry propagation structures and are suitable for hardware implementations where the dimension of the field is large and may vary. This is the typical case for cryptographic applications. These architectures are independent of any defining irreducible polynomial of a given degree as well. The time complexity is constant and area complexity is linear (w.r.t. field dimension) and these measures are equivalent to or exceed similar proposed designs.

[1] E. Berlekamp, Algebraic Coding Theory. McGraw-Hill, 1968.
[2] A. Menezes, P. van Ooreschot, and S. Vanstone, Handbook of Applied Cryptography. CRC Press, 1996.
[3] T. Itoh and S. Tsujii, “A Fast Algorithm for Computing Multiplicative Inverses in ${\rm GF}(2^m)$ Using Normal Basis,” Information and Computation, vol. 78, pp. 171-177, 1988.
[4] C.-T. Huang and C.-W. Wu, “High-Speed C-Testable Systolic Array Design for Galois-Field Inversion,” Proc. European Design and Test Conf., pp. 342-346, Mar. 1997.
[5] R. Schroeppel, H. Orman, S. O'Malley, and O. Spatscheck, “Fast Key Exchange with Elliptic Curve Systems,” Advances in Cryptology, Proc. EUROCRYPT '95, pp. 43-56, 1995.
[6] Y. Watanabe, N. Takagi, and K. Takagi, “A VLSI Algorithm for Division in ${\rm GF}(2^m)$ Based on Extended Binary GCD Algorithm,” Trans. Inst. of Electronics, Information and Comm. Engineers, IEICE '02, vol. E85, no. 5, pp. 994-999, 2002.
[7] M. Hasan, “Double-Basis Multiplicative Inversion over ${\rm GF}(2^m)$ ,” IEEE Trans. Computers, vol. 47, no. 9, pp. 960-970, Sept. 1998.
[8] J.-H. Guo and C.-L. Wang, “Bit-Serial Systolic Array Implementation of Euclid's Algorithm for Inversion and Division in $GF(2^m)$ ,” Proc. Technical Papers, Int'l Symp. VLSI Technology, Systems, and Applications, pp. 113-117, June 1997.
[9] J.-H. Guo and C.-L. Wang, “Systolic Array Implementation of Euclid's Algorithm for Inversion and Division in ${\rm GF}(2^m)$ ,” IEE Proc. Computers and Digital Techniques, vol. 145, no. 4, pp. 272-278, July 1998.
[10] C.-H. Wu, C.-M. Wu, M.-D. Shieh, and Y.-T. Hwang, “Systolic VLSI Realization of a Novel Iterative Division Algorithm over ${\rm GF}(2^m)$ : A High Speed Low-Complexity Design,” Proc. IEEE Int'l Symp. Circuits and Systems (ISCAS '01), vol. 4, pp. 33-36, 2001.
[11] C.-H. Wu, C.-M. Wu, M.-D. Shieh, and Y.-T. Hwang, “An Area-Efficient Systolic Division Circuit over ${\rm GF}(2^m)$ for Secure Communication,” Proc. IEEE Int'l Symp. Circuits and Systems (ISCAS '02), vol. 5, pp. 733-736, 2002.
[12] Z. Yan and D. Sarwate, “Systolic Architectures for Finite Field Inversion and Division,” Proc. IEEE Int'l Symp. Circuits and Systems (ISCAS '02), vol. 5, pp. 789-792, 2002.
[13] H. Brunner, A. Curiger, and M. Hofstetter, “On Computing Multiplicative Inverses in ${\rm GF}(2^m)$ ,” IEEE Trans. Computers, vol. 42, no. 8, pp. 1010-1015, Aug. 1993.
[14] A.F. Tenca, G. Todorov, and C. Koc, “High-Radix Design of a Scalable Modular Multiplier,” Proc. Third Int'l Workshop Cryptographic Hardware and Embedded Systems (CHES 2001), pp. 185-201, May 2001.
[15] A. Daneshbeh and M. Hasan, “A Class of Scalable Unidirectional Bit Serial Systolic Architectures for Multiplicative Inversion and Division over ${\rm GF}(2^m)$ ,” Technical Report CORR 2002-35, http:/www.cacr.math.uwaterloo.ca, Dec. 2002.
[16] A. Daneshbeh and M. Hasan, “A Unidirectional Bit Serial Systolic Architectures for Double-Basis Division over ${\rm GF}(2^m)$ ,” Proc. 16th. IEEE Symp. Computer Arithmetic (Arith-16), pp. 174-187, June 2003.
[17] J.-H. Guo and C.-L. Wang, “Systolic Array Implementation of Euclid's Algorithm for Inversion and Division in ${\rm GF}(2^m)$ ,” IEEE Trans. Computers, vol. 47, no. 10, pp. 1161-1167, Oct. 1998.
[18] J.-H. Guo and C.-L. Wang, “Novel Digit-Serial Systolic Array Implementation of Euclid's Algorithm for Division in $GF(2^m)$ ,” Proc. IEEE Int'l Symp. Circuits and Systems (ISCAS '98), vol. 2, pp. 478-481, 1998.
[19] J. McCanny, R. Evans, and J. McWhirter, “Use of Unidirectional Data Flow in Bit-Level Systolic Array Chips,” Electronics Letters, vol. 22, pp. 540-541, May 1986.

Index Terms:
Division, extended Euclidean algorithm, finite fields, field arithmetic, inversion, systolic arrays.
Citation:
Amir K. Daneshbeh, M. Anwar Hasan, "A Class of Unidirectional Bit Serial Systolic Architectures for Multiplicative Inversion and Division over {\rm GF}(2^m)," IEEE Transactions on Computers, vol. 54, no. 3, pp. 370-380, March 2005, doi:10.1109/TC.2005.35
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