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Issue No.03 - March (2005 vol.54)

pp: 243-256

Sorin Cotofana , IEEE

Casper Lageweg , IEEE

Stamatis Vassiliadis , IEEE

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/TC.2005.40

ABSTRACT

This paper investigates the Single Electron Tunneling (SET) technology-based computation of basic addition related arithmetic functions, e.g., addition and multiplication, via a novel computation paradigm, which we refer to as electron counting arithmetic, that is based on controlling the transport of discrete quantities of electrons within the SET circuit. First, assuming that the number of controllable electrons within the system is unrestricted, we prove that the addition of two n{\hbox{-}}{\rm bit} operands can be computed with a depth-2 network composed out of 3n+1 circuit elements and that the multiplication of two n{\hbox{-}}{\rm bit} operands can be computed with a depth-3 network composed out of 4n-1 circuit elements. Second, assuming that the number of controllable electrons cannot be higher than a given constant r determined by practical limitations, we prove that the addition of two n{\hbox{-}}{\rm bit} operands can be computed with a {\rm depth}{\hbox{-}}\left ({\frac{n}{r}}+3 \right ) network composed out of 3n+1 + {\frac{n}{r}} circuit elements. Under the same restriction, we suggest methods to reduce the addition network depth in the order of \log{{\frac{n}{r}}} and to perform n{\hbox{-}}{\rm bit} multiplication in an O(\log{{\frac{n}{r}}}) delay. Finally, we propose SET-based implementations for a set of basic electron counting building blocks and implement a number of circuits operating under the electron counting paradigm as follows: 4-bit Digital to Analog Converter, 5-bit Analog to Digital Converter, 4-bit adder, and 3-bit multiplier. All proposed implementations are verified by means of simulation.

INDEX TERMS

SET, single electron technology, electron counting, addition, multiplication.

CITATION

Sorin Cotofana, Casper Lageweg, Stamatis Vassiliadis, "Addition Related Arithmetic Operations via Controlled Transport of Charge",

*IEEE Transactions on Computers*, vol.54, no. 3, pp. 243-256, March 2005, doi:10.1109/TC.2005.40