Guest Editors' Introduction: Special Issue on Computer Arithmetic
MARCH 2005 (Vol. 54, No. 3) pp. 241-242
0018-9340/05/$31.00 © 2005 IEEE

Published by the IEEE Computer Society
Guest Editors' Introduction: Special Issue on Computer Arithmetic
Michael J. Schulte , IEEE Member

Jean-Claude Bajard , IEEE Computer Society Member
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Computer arithmetic is one of the oldest research topics. Early civilizations used marked bones to memorize numerical values. This approach can be viewed as a combination of read only memories and a unary number system in which addition was very efficient. Around 3300 BC, the first true number systems appeared when Sumerian clay tablets were used to implement a radix-60 number system. A variation of this system is still used today when dealing with minutes and seconds. The basis of our current decimal number system originated during the sixth century in India and was later adopted in Europe during the 12th century.
As mankind continues to advance and new applications and technologies emerge, innovative research in computer arithmetic is essential. Important applications, including multimedia processing, cryptography, and computer graphics, all need novel arithmetic algorithms and hardware designs to satisfy stringent area, delay, and power requirements. Furthermore, advances in VLSI technology, innovations in tools for electronic design automation, and the advent of nanotechnology and quantum computing offer new opportunities for implementing complex algorithms in hardware.
This special issue presents recent high-quality research in computer arithmetic. The 12 papers included in this special issue were selected from 36 papers submitted in response to an open call for papers. This call for papers followed the 16th IEEE International Symposium on Computer Arithmetic, which took place in Santiago de Compostella in June 2003. Each paper received at least three reviews and the top papers were selected for inclusion in this special issue. Six papers are expanded versions of the papers presented at the 16th IEEE Symposium on Computer Arithmetic, three are expanded versions of papers presented at other conferences, and three are original contributions. The papers in the special issue are grouped into four categories: number systems, multiplication and division, elementary functions, and cryptography.
Number systems are an important research topic since they form the basis of computer arithmetic. In the 21st century, new number systems are needed that are well-suited to emerging technologies and applications. In the paper "Addition Related Arithmetic Operations via Controlled Transport of Charge," Sorin Cotofana, Casper Lageweg, and Stamatis Vassiliadis present several novel approaches for implementing arithmetic operations in Single Electron Tunneling (SET) technology. The authors propose basic building blocks for counting electrons using SET technology and show how these building blocks can be used to efficiently implement addition and multiplication. In the paper "Efficient Techniques for Binary-to-Multidigit Multidimensional Logarithmic Number System Conversion Using Range Addressable Look-Up Tables," Roberto Muscedere, Vassil Dimitrov, Graham A. Jullien, and William C. Miller present novel techniques for converting from binary to multidimensional logarithmic number systems. The proposed conversion techniques use range addressable table lookups to reduce memory requirements and offer trade offs in terms of hardware cost and conversion accuracy.
Improving the efficiency of multiplication and division continues to be a vital research area due to the widespread use of multiplication in many important applications and the long latency of most division algorithms. In the paper "High-Performance Low-Power Left-to-Right Array Multiplier Design," Zhijun Huang and Miloš D. Ercegovac present several techniques for improving the performance and power dissipation of array multipliers. These techniques include signal flow optimization during partial product reduction, a left-to-right leapfrog structure, and splitting of the reduction array into upper and lower parts. In the paper "Architecture and Implementation of a Vector/SIMD Multiply-Accumulate Unit," Albert Danysh and Dimitri Tan introduce a 64-bit fixed-point vector multiply-accumulator (MAC) architecture that supports one $64\times64$ , two $32\times32$ , four $16\times16$ , or eight $8\times8$ bit signed/unsigned multiply-accumulate operations. Compared to a scalar 64-bit MAC, the proposed vector 64-bit MAC has only a small increase in area and delay. In the paper "Digit Selection for SRT Division and Square Root," Peter Kornerup gives expressions for the number of bits needed from the truncated remainder and divisor to guarantee correct digit selection for SRT division. He then extends this analysis for SRT square root and shows that SRT square root often requires more bits than SRT division.
Fast methods for computing elementary functions are important due to their frequent use in digital signal processing, multimedia, and computer graphics applications. In the paper "High-Speed Function Approximation Using a Minimax Quadratic Interpolator," Jose-Alejandro Piñeiro, Stuart F. Oberman, Jean-Michel Muller, and Javier D. Bruguera present a high-speed method for approximating elementary functions. Their method uses table lookups, an enhanced minimax quadratic approximation, and an efficient evaluation of the second-degree polynomial. In the paper "Multipartite Table Methods," Florent de Dinechin and Arnaud Tisserand provide a unified view of previous function approximation techniques that use table lookup and addition. Their unified view enables a wider design space exploration of these methods and leads to tables that are up to 50 percent smaller than the best tables previously published. In the paper "A New Range-Reduction Algorithm," Nicolas Brisebarre, David Defour, Peter Kornerup, Jean-Michel Muller, and Nathalie Revol introduce an algorithm for range reduction that is fast for input arguments belonging to the most common domains, yet accurate over the full range of double-precision numbers. Accurate range reduction is important since most elementary function evaluation techniques are efficient over a small domain. In the paper "Searching Worst Cases of a One-Variable Function Using Lattice Reduction," Damien Stehlé, Vincent Lefèvre, and Paul Zimmermann propose a novel algorithm to find the worst case inputs for correct rounding of a given mathematical function. Their algorithm has lower complexity than previous algorithms and facilitates the design of efficient elementary function libraries that guarantee correct rounding. In the paper "High-Throughput CORDIC-Based Geometry Operations for 3D Computer Graphics," Tomàs Lang and Elisardo Antelo present the formulation of useful 3D computer graphics operations in terms of CORDIC-type primitives. They also give an overview of a stream processor that uses CORDIC-type modules to implement graphic operations and compare their design to current implementations.
New algorithms and architectures for cryptography are needed due to the growing importance of information security and the need to transmit secure information at very high speeds. Techniques for public key cryptography often perform operations on very large integers or large finite fields. In the paper "Five, Six, and Seven-Term Karatsuba-Like Formulae," Peter L. Montgomery describes new techniques for multiplying polynomials in subquadratic time. These techniques can be used recursively to facilitate multiplication of high degree polynomials, which is an important operation in elliptic curve cryptography. In the paper "A Class of Unidirectional Bit Serial Systolic Architectures for Multiplicative Inversion and Division over ${\rm GF}(2^m)$ ," Amir K. Daneshbeh and M. Anwar Hasan propose systolic architectures for finite field arithmetic that use both triangular and polynomial basis representations. These architectures are free of carry propagation and suitable for hardware implementations for which the dimension of the field is large and may vary.
We thank all of the authors who submitted to this special issue, including the authors whose submissions could not be included. We are very grateful to the anonymous reviews for their thorough and timely evaluation of the manuscripts. Special thanks are due to the Editor-in-Chief, Viktor Prasanna, for hosting this special issue on Computer Arithmetic. We warmly thank Suzanne Werner and Joyce Arnold for providing much needed staff support.
Michael J. Schulte
Jean-Claude Bajard
Guest Editors

    M.J. Schulte is with the University of Wisconsin-Madison, Madison, WI 53706. E-mail: schulte@engr.wisc.edu.

    J.-C. Bajard is with LIRMM CNRS, University of Montpelier II, 34392 Montpelier cedex 5, France. E-mail: Jean-Claude.Bajard@lirmm.fr.

Published online 18 Jan. 2005.

For information on obtaining reprints of this article, please send e-mail to: tc@computer.org.





Michael J. Schulte received the BS degree in electrical engineering from the University of Wisconsin-Madison in 1991 and the MS and PhD degrees in electrical engineering from the University of Texas at Austin in 1992 and 1996, respectively. From 1996 to 2002, he was an assistant and associate professor at Lehigh University, where he directed the Computer Architecture and Arithmetic Research Laboratory. In 1997, he received a US National Science Foundation CAREER Award to research hardware support for accurate and reliable numerical computations. Professor Schulte has consulted for or had joint research projects with Sandbridge Technologies, IBM, Sun Microsystems, ARM, Lucent Technologies, Agere Systems, MIPS Technologies, and Sandia National Laboratories. He is currently an assistant professor at the University of Wisconsin-Madison, where he leads the Madison Embedded Systems and Architectures Group. His research interests include high-performance embedded processors, computer architecture, domain-specific systems, computer arithmetic, and wireless security. He is a member of the IEEE and the IEEE Computer Society and an associate editor for the IEEE Transactions on Computers and the Journal of VLSI Sgnal Pocessing.





Jean-Claude Bajard received the MSc degree (1990) and the PhD degree (1993) in computer science from the École Normale Supérieure de Lyon and Claude Bernard University, France. In 1993, he joined the University of Provence, Marseille, France, as associate professor, where he earned the "Habilitation à Diriger des Recherches" in 1998. Since 1999, he has been a full professor in computer science at the Institute of Technology (IUT) of the University Montpellier II. He has been doing his research with the CNRS Laboratory, LIRMM UMR 5506, where he was the head of the "Fundamental Computer Science and Applications" Department from 2000 to 2003. Professor Bajard's research interests are in the field of computer arithmetic, in particular, number representations, elementary functions, multiprecision computing, modular arithmetic, finite fields, operators for cryptography, and VLSI algorithms. He is a member of the IEEE Computer Society.