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Secondary Radix Recodings for Higher Radix Multipliers
February 2005 (vol. 54 no. 2)
pp. 111-123
ASCII Text
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Peter-Michael Seidel, Lee D. McFearin, David W. Matula, "Secondary Radix Recodings for Higher Radix Multipliers," IEEE Transactions on Computers, vol. 54, no. 2, pp. 111-123, February, 2005.
 
 
BibTex
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@article{ 10.1109/TC.2005.32,
author = {Peter-Michael Seidel and Lee D. McFearin and David W. Matula},
title = {Secondary Radix Recodings for Higher Radix Multipliers},
journal ={IEEE Transactions on Computers},
volume = {54},
number = {2},
issn = {0018-9340},
year = {2005},
pages = {111-123},
doi = {http://doi.ieeecomputersociety.org/10.1109/TC.2005.32},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - JOUR
JO - IEEE Transactions on Computers
TI - Secondary Radix Recodings for Higher Radix Multipliers
IS - 2
SN - 0018-9340
SP111
EP123
EPD - 111-123
A1 - Peter-Michael Seidel,
A1 - Lee D. McFearin,
A1 - David W. Matula,
PY - 2005
KW - Binary multiplication
KW - recoding
KW - high radix
KW - digit set
KW - Booth recoding
KW - partial product reduction
KW - mixed radix representation.
VL - 54
JA - IEEE Transactions on Computers
ER -
 
For progressively higher radices, the reduction in partial products obtained by the well-known modified Booth multiplier recoding is offset by the need to precompute a rapidly increasing store of odd multiples of the multiplicand as inputs to each partial product generator (PPG). We propose secondary radix multiplier recoding schemes reducing the number of odd multiples required in the store for very high radix recodings (e.g., radix 2^r for 5 \le r \le 16). The proposed recoding schemes allow reduction of the number of partial products in the implementation by factors between and beyond the reduction factors of 2, 3, and 4 that can be achieved by traditional Booth recodings to radices 4, 8, and 16, respectively. We develop the theory of these recodings and provide methodology for secondary radix selection. Finally, we summarize latency and cost evaluations of selected implementations indicating potential cost and performance/cost advantages for practical operand sizes.

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Index Terms:
Binary multiplication, recoding, high radix, digit set, Booth recoding, partial product reduction, mixed radix representation.
Citation:
Peter-Michael Seidel, Lee D. McFearin, David W. Matula, "Secondary Radix Recodings for Higher Radix Multipliers," IEEE Transactions on Computers, vol. 54, no. 2, pp. 111-123, Feb. 2005, doi:10.1109/TC.2005.32
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