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Enhanced Interval Trees for Dynamic IP Router-Tables
December 2004 (vol. 53 no. 12)
pp. 1615-1628
Haibin Lu, IEEE
We develop an enhanced interval tree data structure that is suitable for the representation of dynamic IP router tables. Several refinements of this enhanced structure are proposed for a variety of IP router tables. For example, the data structure called BOB (binary tree on binary tree) is developed for dynamic router tables in which the rule filters are nonintersecting ranges and in which ties are broken by selecting the highest-priority rule that matches a destination address. Prefix filters are a special case of nonintersecting ranges and the commonly used longest-prefix tie breaker is a special case of the highest-priority tie breaker. When an n-rule router table is represented using BOB, the highest-priority rule that matches a destination address may be found in O(\log ^2 n) time; a new rule may be inserted and an old one deleted in O(\log n) time. For general ranges, the data structure CBOB (compact BOB is proposed). For the case when all rule filters are prefixes, the data structure PBOB (prefix BOB) permits highest-priority matching as well as rule insertion and deletion in O(W) time, where W is the length of the longest prefix, each. When all rule filters are prefixes and longest-prefix matching is to be done, the data structure LMPBOB (longest matching-prefix BOB) permits longest-prefix matching in O(W) time; rule insertion and deletion each take O(\log n) time. On practical rule tables, BOB and PBOB perform each of the three dynamic-table operations in O(\log n) time and with O(\log n) cache misses. The number of cache misses incurred by LMPBOB is also O(\log n). Experimental results also are presented.

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Index Terms:
Interval trees, packet classification, packet routing, router tables, highest-priority matching, longest-prefix matching, dynamic rule-tables, rule insertion and deletion.
Citation:
Haibin Lu, Sartaj Sahni, "Enhanced Interval Trees for Dynamic IP Router-Tables," IEEE Transactions on Computers, vol. 53, no. 12, pp. 1615-1628, Dec. 2004, doi:10.1109/TC.2004.116
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