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| Hettihe P. Dharmasena, Ramachandran Vaidyanathan, "Lower Bounds on the Loading of Multiple Bus Networks for Binary Tree Algorithms," IEEE Transactions on Computers, vol. 53, no. 12, pp. 1535-1546, December, 2004. | |||
| BibTex | x | ||
| @article{ 10.1109/TC.2004.117, author = {Hettihe P. Dharmasena and Ramachandran Vaidyanathan}, title = {Lower Bounds on the Loading of Multiple Bus Networks for Binary Tree Algorithms}, journal ={IEEE Transactions on Computers}, volume = {53}, number = {12}, issn = {0018-9340}, year = {2004}, pages = {1535-1546}, doi = {http://doi.ieeecomputersociety.org/10.1109/TC.2004.117}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - JOUR JO - IEEE Transactions on Computers TI - Lower Bounds on the Loading of Multiple Bus Networks for Binary Tree Algorithms IS - 12 SN - 0018-9340 SP1535 EP1546 EPD - 1535-1546 A1 - Hettihe P. Dharmasena, A1 - Ramachandran Vaidyanathan, PY - 2004 KW - Multiple bus networks KW - binary tree algorithms KW - bus loading KW - lower bounds KW - interconnection networks. VL - 53 JA - IEEE Transactions on Computers ER - | |||
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