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Issue No.12 - December (2004 vol.53)
pp: 1505-1507
Published by the IEEE Computer Society
On behalf of the IEEE Computer Society and the Editorial Board of this journal, I wish to thank the following people, who have retired from the board, for their service: Pascale Charpin, Mark Crovella, Kemal Ebciouglu, Matthew Farrens, Laxmi P. Gewali, Anwar Hasan, David Kaeli, Paolo Montuschi, Irith Pomeranz, Karsten Schwan, H.J. Siegel, Anand Sivasubramaniam, Gurindar Sohi, Per Stenstrom, Ioannis Tollis, Peter Varman, Uzi Vishkin, and Scott Wills. It has been an honor and a pleasure working with them. I would like to take this opportunity to thank them for the selfless service they have given these transactions during all these years. It is only with the work of dedicated volunteers such as these that we have been able to continue offering the scientific community the high quality papers, which remain the trademark of the IEEE Transactions on Computers.
At the same time, I am pleased to welcome Jean-Claude Bajard, Todd Brun, Frank Dehne, Michel Dubois, Antonio M. González, Cecilia Metra, and Assaf Schuster, who are now joining the Editorial Board. Their biographical sketches highlight their accomplishments and areas of expertise. They are all internationally recognized in their fields and the journal is fortunate indeed to have these outstanding researchers as members of the Editorial Board.
Dr. Bajard will help us handle papers in several important areas, including number systems and computer arithmetic. Dr. Brun will help us handle papers in several important areas, including quantum computation and quantum information theory (which include quantum cryptography, quantum error correction, quantum communications, entanglement quantification, and other topics), and simulation of quantum systems. Dr. Dehne will help us handle papers in several important areas, including algorithms and data structures, practical implementations and related issues, parallel algorithms, data warehousing, bioinformatics, and computational geometry. Dr. Dubois will help us handle papers in several important areas, including computer architecture and parallel processing, with a focus on multiprocessor architecture, performance and algorithms. Dr. González will help us handle papers in several important areas, including processor microarchitecture, and code generation and optimization. Dr. Metra will help us handle papers in several important areas, including testing methods and tools, fault tolerance, reliability, security, and testability. Dr. Schuster will help us handle papers in several important areas, including large-scale distributed systems, distributed data mining and model checking, and security aspects of distributed systems.
Viktor K. Prasanna
Editor-in-Chief



Jean Claude Bajard received the MSc degree (1990) and the PhD degree (1993) in computer science from the École Normale Supérieure de Lyon and Claude Bernard University, France. He taught mathematics in high school from 1979 to 1990, then he served as an assistant professor in computer science at the École Normale Supérieure de Lyon from 1990 to 1993, on the team of Jean-Michel Muller. In 1993, he joined the University of Provence, Marseille, France, as associate professor, where he earned, in 1998, the "Habilitation à Diriger des Recherche."Since 1999, he has been a full professor in computer science at the Institute of Technology (IUT) of the University of Montpellier II. He has been doing his research with the CNRS Laboratory, LIRMM UMR 5506, where he was the head of the "fundamental computer science and applications" department from 2000 to 2003. His research interests are in computer arithmetic, in particular, number representations, elementary functions, multiprecision computing, modular arithmetic, finite fields, operators for cryptography, VLSI algorithms. His main international collaborations are with Milos Ercegovac (UCLA), Graham Jullien (ATIPS), and Peter Kornerup (Odense). He has served on the program committees of the IEEE Symposia on Computer Arithmetic and served as coprogram chair for this symposium in 2003. He is also serving as a coeditor, with Michael Schulte, of a special issue of the IEEE Transactions on Computers (to appear in 2005). He is a member of the IEEE Computer Society.



Todd Brun received the AB degree in physics from Harvard University in 1989 and the MS and PhD degrees in physics in 1991 and 1994 from the California Institute of Technology. From 1994 to 2000, he held postdoctoral positions at Queen Mary and Westfield College, London, at the Institute for Theoretical Physics, Santa Barbara, California, and at Carnegie Mellon University, Pittsburgh. From 2000 to 2003, he was a member of the School of Natural Sciences at the Institute for Advanced Study in Princeton. Since 2003, he has been a faculty member in the Department of Electrical Engineering at the University of Southern California, where he is an assistant professor. His research is in quantum computation and quantum information processing.



Frank Dehne received the MCS degree (Dipl. Inform.) from the TechnicalUniversity of Aachen, Germany, in 1983 and the PhD degree (Dr. Rer. Nat.) from theUniversity of Würzburg, Germany, in 1986. In 1986, he joined the School ofComputer Science at Carleton University in Ottawa, Canada, as an assistant professor. He was appointed an associate professor and professor of computer science in 1990 and 1997, respectively. From 2000 to 2003, he served as the director of the School of Computer Science. In 2004, he was appointed a professor of information technology at Griffith University in Brisbane, Australia. His current research interests are in the general area of algorithms and practical implementations, in particular parallel computing, coarse-grained parallel algorithms, computational geometry, parallel data warehousing and OLAP, and parallel bioinformatics. He is particularly interested in the interrelationship between the theoretical analysis of algorithms and the performance observed when these algorithms are implemented. He is a senior member of the IEEE, vice-chair of the IEEETechnical Committee on Parallel Processing, and a member of the Steering Committee of the ACM Symposium on Parallel Algorithms and Architectures.He is a founding co-investigator of HPCVL ( www.hpcvl.org), a largeregional parallel computing center with more than $40M funding fromgovernment and industry. He is also an editor of the journals Information Processing Letters, Parallel Algorithms and Applications, and International Journal of Data Warehousing and Mining, as well as a cofounder of the Workshop on Algorithms and Data Structures ( www.wads.org) and the InternationalWorkshop on Parameterized and Exact Computation ( www.iwpec.org). He was awarded two Carleton University Research Achievement Awards in 1992 and 1998, respectively, each awarding him a one year release from all teaching duties for the purpose of pursuing his research interests.



Michel Duboisreceived the PhD degree from Purdue University, the MS degree from the University of Minnesota, and an engineering degree from the Faculte Polytechnique de Mons in Belgium, all in electrical engineering. He is a professor in the Department of Electrical Engineering at the University of Southern California (USC). Before joining USC in 1984, he was a research engineer at the Central Research Laboratory of Thomson-CSF in Orsay, France. His main interests are computer architecture and parallel processing, with a focus onmultiprocessor architecture, performance, and algorithms. He has published more than 120 papers in technical journals and leading conferences on these topics. He is a member of the ACM and a fellow of the IEEE.



Antonio González received the MS and PhD degrees from the Universitat Politècnica de Catalunya (UPC), Barcelona, Spain. He has been a faculty member of the Computer Architecture Department at UPC since 1986 and he is currently a professor at this department. He leads the Intel-UPC Barcelona Research Center, whose research focuses on new microarchitecture paradigms and code generation techniques for future microprocessors. His research has focused on computer architecture, compilers, and parallel processing, with a special emphasis on processor microarchitecture and code generation. He has published more than 180 papers and filed seven patents in the areas of power-aware microarchitectures,clustered microarchitectures, speculative multithreaded processors, data value and data dependence speculation and reuse, cache architectures, register file architecture, modulo scheduling, code analysis and optimization, mapping parallel algorithms to multicomputers, prolog-oriented architectures, instruction fetching mechanisms, and digital image processing. He is an associate editor of the IEEE Transactions on Parallel and Distributed Systems, ACM Transactions on Architecture and Code Optimization, and Journal of Embedded Computing. He has served on more than 50 program committees for international symposia in the field of computer architecture, including ISCA, MICRO, HPCA, PACT, ICS, ICCD, ISPASS, CASES, and IPDPS. He was program (co)chair for ICS 2003, ISPASS 2003, and MICRO 2004, among other symposia.



Cecilia Metrareceived the degree (summa cum laude) in electronic engineering and the PhD degree in electronic engineering and computer science from the University of Bologna, Italy. Since 2000, she has been anassistant professor in electronics at the University of Bologna, Italy, and she qualified as an associate professor in electronics in 2003. From 1998 to 2001, she was a visiting scholar at the University of Washington, Seattle, while, in 2002, she was a visiting faculty consultant for Intel, Santa Clara, California. She has served as general cochair, program cochair, topic chair, and technical program committee member of several international conferences, symposia, and workshops, as well as as a guest coeditor of special issues of several international journals and magazines. Her research interests are in the field of design and test of digital systems, reliable and error resilient systems, fault tolerance, online testing, fault modeling, and concurrent diagnosis.



Assaf Schusterreceived the BA, MA, and PhD degrees in mathematics and computer science from the Hebrew University of Jerusalem, the latter one in 1991. He is an associate professor in the Computer Science Department at the Technion-Israel Institute of Technology. His research interests and fields of publication include memory hierarchies and consistency models, distributed shared memory, parallel and distributed computing, scalable model checking, large-scale Grid systems, locality in large-scale systems, scalable distributed data mining, and privacy preserving in large-scale systems. He established and serves as the head of the Distributed Systems Laboratory at the Technion ( http://dsl.cs.technion.ac.il), serves as an associate editor of the Journal of Parallel and Distributed Computing, is leading several large efforts in his area, collaborates with European and American projects, has served as a consultant to several leading hi-tech companies such as IBM and Hewlett-Packard, and is listed on the advisory board of several startups in his fields of expertise.
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