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Issue No.09 - September (2004 vol.53)

pp: 1121-1133

Irith Pomeranz , IEEE

Sudhakar M. Reddy , IEEE

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/TC.2004.63

ABSTRACT

When storage requirements or limits on test application time do not allow a complete (compact) test set to be used for a circuit, a partial test set that detects as many faults as possible is required. Motivated by this application, we address the following problem. Given a test sequence T of length L for a synchronous sequential circuit and a length M <L, find a test sequence T_S of length at most M such that the fault coverage of T_S is maximal. A similar problem was considered before for combinational and scan circuits and solved by test ordering. Test ordering is not possible with the single test sequence considered here for sequential circuits. We solve this problem by using a vector omission process that allows the length of the sequence T to be reduced while allowing minimal reductions in the number of detected faults. Using this process, it is possible to obtain a sequence T_S that has the desired length and a maximal fault coverage.

INDEX TERMS

Synchronous sequential circuits, test application time, test compaction.

CITATION

Irith Pomeranz, Sudhakar M. Reddy, "On Maximizing the Fault Coverage for a Given Test Length Limit in a Synchronous Sequential Circuit",

*IEEE Transactions on Computers*, vol.53, no. 9, pp. 1121-1133, September 2004, doi:10.1109/TC.2004.63