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Algorithm and Architecture for Logarithm, Exponential, and Powering Computation
September 2004 (vol. 53 no. 9)
pp. 1085-1096
An architecture for the computation of logarithm, exponential, and powering operations is presented in this paper, based on a high-radix composite algorithm for the computation of the powering function (X^{Y}). The algorithm consists of a sequence of overlapped operations: 1) digit-recurrence logarithm, 2) left-to-right carry-free (LRCF) multiplication, and 3) online exponential. A redundant number system is used and the selection in 1) and 3) is done by rounding except from the first iteration, when selection by table look-up is necessary to guarantee the convergence of the recurrences. A sequential implementation of the algorithm, with a control unit which allows the independent computation of logarithm and exponential, is proposed and the execution times and hardware requirements are estimated for single and double-precision floating-point computations. These estimates are obtained for radices from r=8 to r=1,024, according to an approximate model for the delay and area of the main logic blocks and help determining the radix values which lead to the most efficient implementations: r=32 and r=128.

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Index Terms:
Computer arithmetic, elementary function approximation, digit-recurrence algorithms, logarithm, exponential, powering, high-radix, LRCF multiplication, online arithmetic.
J.-A. Pi?eiro, M.D. Ercegovac, J.D. Bruguera, "Algorithm and Architecture for Logarithm, Exponential, and Powering Computation," IEEE Transactions on Computers, vol. 53, no. 9, pp. 1085-1096, Sept. 2004, doi:10.1109/TC.2004.53
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