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Locality-Based Online Trace Compression
June 2004 (vol. 53 no. 6)
pp. 723-731

Abstract—Trace-driven simulation is one of the most important techniques used by computer architecture researchers to study the behavior of complex systems and to evaluate new microarchitecture enhancements. However, modern benchmarks, which largely resemble real-world applications, result in long and unmanageable traces. Compression techniques can be employed to reduce storage requirement of traces. Special trace compression schemes such as Mache and PDATS/PDI take advantage of spatial locality to compress memory reference addresses. In this paper, we propose the Locality-Based Trace Compression (LBTC) method, which employs both spatial locality and temporal locality of program memory references. It efficiently compresses not only the address but also other attributes associated with each memory reference. In addition, LBTC is designed to be simple and on-the-fly. If traces with addresses and other attributes are compressed by LBTC, the compression ratio is better by a factor of 2 over compression by PDI.

[1] A. Agarwal and M. Huffman, Blocking: Exploiting Spatial Locality for Trace Compaction Proc. 1990 ACM SIGMETRICS Conf. Measurement and Modeling of Computer Systems, pp. 48-57, 1990.
[2] Apache Software Foundation, mod_perl Home Page http:/perl.apache.org/, 2003.
[3] J.C. Becker, A. Park, and M. Farrens, An Analysis of the Information Content of Address Reference Streams Proc. 24th Ann. Int'l Symp. Microarchitecture, pp. 19-24, 1991.
[4] M. Burtscher and M. Jeeradit, Compressing Extended Program Traces Using Value Predictors Proc. 12th Int'l Conf. Parallel Architectures and Compilation Techniques (PACT), pp. 159-169, Sept. 2003.
[5] T. Chilimbi, R. Jones, and B. Zorn, Designing a Trace Format for Heap Allocation Events ACM SIGPLAN Notices, vol. 36, no. 1, pp. 35-49, Jan. 2001.
[6] L. DeRose, K. Ekanadham, J.K. Hollingsworth, and S. Sbaraglia, SIGMA: A Simulator Infrastructure to Guide Memory Analysis Proc. 2002 ACM/IEEE Conf. Supercomputing, pp. 1-13, 2002.
[7] J. Edler and M.D. Hill, Dinero IV Trace-Driven Uniprocessor Cache Simulator http://www.cs.wisc.edu/~markhillDineroIV /, 2003.
[8] E.N. Elnozahy, Address Trace Compression through Loop Detection and Reduction Proc. 1999 ACM SIGMETRICS Int'l Conf. Measurement and Modeling of Computer Systems, pp. 214-215, 1999.
[9] D.W. Hammerstrom and E.S. Davidson, Information Content of CPU Memory Referencing Behavior Proc. Fourth Ann. Symp. Computer Architecture, pp. 184-192, 1977.
[10] A. Hamou-Lhadj and T.C. Lethbridge, Compression Techniques to Simplify the Analysis of Large Execution Traces Proc. 10th Int'l Workshop Program Comprehension (IWPC '02), pp. 159-168, June 2002.
[11] E.E. Johnson, H. Jiheng, and M. Baqar Zaidi, Lossless Trace Compression IEEE Trans. Computers, vol. 50, no. 2, pp. 158-173, Feb. 2001.
[12] J.R. Larus, Efficient Program Tracing Computer, vol. 26 no. 5, pp. 52-61, May 1993.
[13] P.S. Magnusson et al., "Simics: A Full System Simulation Platform," Computer, Feb. 2002, pp. 50-58.
[14] A. Milenkovic and M. Milenkovic, Stream-Based Trace Compression Computer Architecture Letters, vol. 2, Sept. 2003.
[15] A.R. Pleszkun, Techniques for Compressing Program Address Traces Proc. 27th Ann. IEEE/ACM Int'l Symp. Microarchitecture, pp. 32-40, 1994.
[16] T.R. Puzak, Analysis of Cache Replacement Algorithms PhD dissertation, Univ. of Massachusetts, 1985.
[17] A.D. Samples, Mache: No-Loss Trace Compaction Proc. 1989 ACM SIGMETRICS Int'l Conf. Measurement and Modeling of Computer Systems, pp. 89-97, 1989.
[18] C.D. Schieber and E.E. Johnson, RATCHET: Real-Time Address Trace Compression Hardware for Extended Traces ACM SIGMETRICS Performance Evaluation Rev., vol. 21, nos. 3-4, pp. 22-32, Apr. 1994.
[19] T. Sherwood, E. Perelman, G. Hamerly, and B. Calder, Automatically Characterizing Large Scale Program Behavior Proc. 10th Int'l Conf. Architectural Support for Programming Languages and Operating Systems (ASPLOS 2002), pp. 45-57, 2002.
[20] A.J. Smith, Two Methods for the Efficient Analysis of Memory Address Trace Data IEEE Trans. Software Eng., vol. 3 no. 1, 1977.
[21] Standard Performance Evaluation Corp.,http://www.spec.orgcpu2000/, 2004.
[22] Standard Performance Evaluation Corp.,http://www.spec.orgweb99/, 2004.
[23] R. Todi, SPEClite: Using Representative Samples to Reduce SPEC CPU2000 Workload Proc. Fourth Ann. IEEE Int'l Workshop Workload Characterization, pp. 15-23, 2001.
[24] T.A. Welch, A Technique for High-Performance Data Compression Computer, vol. 17, no. 6, pp. 8-19, June 1984.
[25] J. Ziv and A. Lempel, "A Universal Algorithm for Sequential Data Compression," IEEE Trans. Information Theory, vol. 23, no. 3, pp. 337-343, 1977.

Index Terms:
Measurement techniques, tracing, performance analysis and design aids, modeling of computer architecture.
Citation:
Yue Luo, Lizy Kurian John, "Locality-Based Online Trace Compression," IEEE Transactions on Computers, vol. 53, no. 6, pp. 723-731, June 2004, doi:10.1109/TC.2004.12
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