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Zhiyuan Yan, Dilip V. Sarwate, "New Systolic Architectures for Inversion and Division in GF(2^m)," IEEE Transactions on Computers, vol. 52, no. 11, pp. 15141519, November, 2003.  
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@article{ 10.1109/TC.2003.1244950, author = {Zhiyuan Yan and Dilip V. Sarwate}, title = {New Systolic Architectures for Inversion and Division in GF(2^m)}, journal ={IEEE Transactions on Computers}, volume = {52}, number = {11}, issn = {00189340}, year = {2003}, pages = {15141519}, doi = {http://doi.ieeecomputersociety.org/10.1109/TC.2003.1244950}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }  
RefWorks Procite/RefMan/Endnote  x  
TY  JOUR JO  IEEE Transactions on Computers TI  New Systolic Architectures for Inversion and Division in GF(2^m) IS  11 SN  00189340 SP1514 EP1519 EPD  15141519 A1  Zhiyuan Yan, A1  Dilip V. Sarwate, PY  2003 KW  Finite fields KW  field arithmetic KW  inversion KW  division KW  systolic KW  extended Euclidean algorithm. VL  52 JA  IEEE Transactions on Computers ER   
Abstract—We present two systolic architectures for inversion and division in GF(2^m)based on a modified extended Euclidean algorithm. Our architectures are similar to those proposed by others in that they consist of twodimensional arrays of computing cells and control cells with only local intercell connections and have O(m^2) areatime product. However, in comparison to similar architectures, both our architectures have critical path delays that are smaller, gate counts that range from being considerably smaller to only slightly larger, and latencies that are identical for inversion but somewhat larger for division. One architecture uses an adder or an (m + 1)bit ring counter inside each control cell, while the other architecture distributes the ring counters into the computing cells, thereby reducing each control cell to just two gates.
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