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Issue No.07 - July (2003 vol.52)
pp: 896-906
<p><b>Abstract</b>—Modulo <tmath>2^n - 1</tmath> adders as fast as <tmath>n{\hbox{-}}{\rm bit}</tmath> 2's complement adders have been recently proposed in the open literature. This makes a Residue Number System (RNS) adder with channels based on the moduli <tmath>2^n </tmath>, <tmath>2^n - 1</tmath>, and any other of the form <tmath>2^k - 1</tmath>, with <tmath>k<n</tmath>, faster than RNS adders based on other moduli. In this paper, we formally derive a parametric, with respect to the adder size, test set, for parallel testing of the channels of an RNS adder based on moduli of the form <tmath>2^n ,2^n - 1,2^k - 1,2^l - 1,\ldots,</tmath> with <tmath>l<k<n</tmath>. The derived test set is reusable; it can be used for any value of <tmath>n, k, l,\ldots</tmath>, regardless of the implementation library used and is composed of <tmath>n^2 + 2</tmath> test vectors. A test-per-clock BIST scheme is also proposed that applies the derived test vectors within <tmath>n^2 + 2n</tmath> cycles. Static CMOS implementations reveal that the proposed BIST offers 100 percent postcompaction fault coverage and an attractive combination of test time and implementation area compared to ROM and FSM-based deterministic BIST or LFSR-based pseudorandom BIST.</p>
Residue Number System, Built-In Self-Test, deterministic and pseudorandom tests, formal test sets.
Haridimos T. Vergos, Dimitris Nikolos, Maciej Bellos, Costas Efstathiou, "Deterministic BIST for RNS Adders", IEEE Transactions on Computers, vol.52, no. 7, pp. 896-906, July 2003, doi:10.1109/TC.2003.1214338
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