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A Scalable Dual-Field Elliptic Curve Cryptographic Processor
April 2003 (vol. 52 no. 4)
pp. 449-460

Abstract—We propose an elliptic curve (EC) cryptographic processor architecture that can support Galois fields {\rm GF}(p) and {\rm GF}(2^n) for arbitrary prime numbers and irreducible polynomials by introducing a dual field multiplier. A Montgomery multiplier with an optimized data bus and an on-the-fly redundant binary converter boost the throughput of the EC scalar multiplication. All popular cryptographic functions such as DSA, EC-DSA, RSA, CRT, and prime generation are also supported. All commands are organized in a hierarchical structure according to their complexity. Our processor has high scalability and flexibility between speed, hardware area, and operand size. In the hardware evaluation using a 0.13-\mum CMOS standard cell library, the high-speed design using 117.5 Kgates with a 64-bit multiplier achieved operation times of 1.21 ms and 0.19 ms for a 160-bit EC scalar multiplication in {\rm GF}(p) and {\rm GF}(2^n), respectively. A compact version with an 8-bit multiplier requires only 28.3K gates and executes the operations in 7.47 ms and 2.79 ms. Not only 160-bit operations, but any bit length can be supported by any hardware configuration so long as the memory capacity is sufficient.

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Index Terms:
Elliptic curve cryptography, public key cryptography, Montgomery multiplication, Galois field, high-speed hardware, ASIC implementation.
Citation:
Akashi Satoh, Kohji Takano, "A Scalable Dual-Field Elliptic Curve Cryptographic Processor," IEEE Transactions on Computers, vol. 52, no. 4, pp. 449-460, April 2003, doi:10.1109/TC.2003.1190586
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