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Probabilistic Miss Equations: Evaluating Memory Hierarchy Performance
March 2003 (vol. 52 no. 3)
pp. 321-336

Abstract—The increasing gap between processor and main memory speeds makes the role of the memory hierarchy behavior in the system performance essential. Both hardware and software techniques to improve this behavior require good analysis tools that help predict and understand such behavior. Analytical modeling arises as a good choice in this field due to its high speed if its traditional limited precision is overcome. We present a modular analytical modeling strategy for arbitrary set-associative caches with LRU replacement policy. The model differs from all the previous related works in its probabilistic approach. Both perfectly and nonperfectly nested loops as well as reuse between different nests are considered by this model, so it makes the analysis of complete programs with regular computations feasible. Moreover, the model achieves good levels of accuracy while being extremely fast and flexible enough to allow its extension. Our approach has been extensively validated using well-known benchmarks. Finally, the model has also proven its ability to drive code optimizations even more successfully than current production compilers.

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Index Terms:
Analytical modeling, probabilistic miss estimation, memory hierarchy, performance prediction, compiler optimizations.
Citation:
Basilio B. Fraguela, Ramón Doallo, Emilio L. Zapata, "Probabilistic Miss Equations: Evaluating Memory Hierarchy Performance," IEEE Transactions on Computers, vol. 52, no. 3, pp. 321-336, March 2003, doi:10.1109/TC.2003.1183947
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