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Issue No.03 - March (2003 vol.52)
pp: 293-309
ABSTRACT
<p><b>Abstract</b>—Spot defects in memory devices are caused by imperfections in the fabrication process of these devices. In order to analyze the faulty effect of spot defects on the memory behavior, simulations have been performed on an electrical model of the memory in which the defects are injected, causing opens, shorts, or bridges. In this paper, simulation is used to analyze the faulty behavior of embedded DRAM (<it>e</it>DRAM) devices produced by Infineon Technologies. The paper applies the new approach of fault primitives to perform this analysis. The analysis shows the existence of most traditional memory fault models and establishes new ones. The paper also investigates the concept of dynamic faulty behavior and establishes its importance for <it>e</it>DRAMs. Conditions to test the newly established fault models, together with a test, are also given.</p>
INDEX TERMS
Embedded DRAM, functional fault models, fault primitives, spot defects, defect simulation, dynamic faulty behavior.
CITATION
Zaid Al-Ars, "Static and Dynamic Behavior of Memory Cell Array Spot Defects in Embedded DRAMs", IEEE Transactions on Computers, vol.52, no. 3, pp. 293-309, March 2003, doi:10.1109/TC.2003.1183945