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Huapeng Wu, M. Anwar Hasan, Ian F. Blake, Shuhong Gao, "Finite Field Multiplier Using Redundant Representation," IEEE Transactions on Computers, vol. 51, no. 11, pp. 13061316, November, 2002.  
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@article{ 10.1109/TC.2002.1047755, author = {Huapeng Wu and M. Anwar Hasan and Ian F. Blake and Shuhong Gao}, title = {Finite Field Multiplier Using Redundant Representation}, journal ={IEEE Transactions on Computers}, volume = {51}, number = {11}, issn = {00189340}, year = {2002}, pages = {13061316}, doi = {http://doi.ieeecomputersociety.org/10.1109/TC.2002.1047755}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }  
RefWorks Procite/RefMan/Endnote  x  
TY  JOUR JO  IEEE Transactions on Computers TI  Finite Field Multiplier Using Redundant Representation IS  11 SN  00189340 SP1306 EP1316 EPD  13061316 A1  Huapeng Wu, A1  M. Anwar Hasan, A1  Ian F. Blake, A1  Shuhong Gao, PY  2002 KW  Finite field arithmetic KW  cyclotomic ring KW  redundant set KW  normal basis KW  multiplier KW  squaring. VL  51 JA  IEEE Transactions on Computers ER   
Abstract—This article presents simple and highly regular architectures for finite field multipliers using a redundant representation. The basic idea is to embed a finite field into a cyclotomic ring which has a basis with the elegant multiplicative structure of a cyclic group. One important feature of our architectures is that they provide areatime tradeoffs which enable us to implement the multipliers in a partialparallel/hybrid fashion. This hybrid architecture has great significance in its VLSI implementation in very large fields. The squaring operation using the redundant representation is simply a permutation of the coordinates. It is shown that, when there is an optimal normal basis, the proposed bitserial and hybrid multiplier architectures have very low space complexity. Constant multiplication is also considered and is shown to have an advantage in using the redundant representation.
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