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Huapeng Wu, "BitParallel Finite Field Multiplier and Squarer Using Polynomial Basis," IEEE Transactions on Computers, vol. 51, no. 7, pp. 750758, July, 2002.  
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@article{ 10.1109/TC.2002.1017695, author = {Huapeng Wu}, title = {BitParallel Finite Field Multiplier and Squarer Using Polynomial Basis}, journal ={IEEE Transactions on Computers}, volume = {51}, number = {7}, issn = {00189340}, year = {2002}, pages = {750758}, doi = {http://doi.ieeecomputersociety.org/10.1109/TC.2002.1017695}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }  
RefWorks Procite/RefMan/Endnote  x  
TY  JOUR JO  IEEE Transactions on Computers TI  BitParallel Finite Field Multiplier and Squarer Using Polynomial Basis IS  7 SN  00189340 SP750 EP758 EPD  750758 A1  Huapeng Wu, PY  2002 KW  Finite fields arithmetic KW  hardware architecture KW  polynomial basis. VL  51 JA  IEEE Transactions on Computers ER   
Bitparallel finite field multiplication using polynomial basis can be realized in two steps: polynomial multiplication and reduction modulo the irreducible polynomial. In this article, we present an upper complexity bound for the modular polynomial reduction. When the field is generated with an irreducible trinomial, closed form expressions for the coefficients of the product are derived in term of the coefficients of the multiplicands. Complexity of the multiplier architectures and their critical path length is evaluated and they are comparable to the previous proposals for the same class of fields. Analytical form for bitparallel squaring operation is also presented. The complexities for bitparallel squarer are also derived when an irreducible trinomial is used. Consequently, it is argued that to solve multiplicative inverse using polynomial basis can be at least as good as using normal basis.
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