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Index

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Issue No.12 - December (2001 vol.50)
pp: 1377-1388
Published by the IEEE Computer Society
ABSTRACT
<a href="http://computer.org/tc/tc2001/t1377.pdf">Available without subscription.</a>
This index covers all technical itemspapers, correspondence, reviews, etc. that appeared in this periodical during 2001, and items from previous years that were commented upon or corrected in 2001. Departments and other items may also be covered if they have been judged to have archival value.
The Author Index contains the primary entry for each item, listed under the first author's name. The primary entry includes the coauthors' names, the title of the paper or other item, and its location, specified by the publication abbreviation, year, month, and inclusive pagination. The Subject Index contains entries describing the item under all appropriate subject headings, plus the first author's name, the publication abbreviation, month, and year, and inclusive pages. Subject cross-references are included to assist in finding items of interest. Note that the item title is found only under the primary entry of the Author Index.

AUTHOR INDEX

A

Aball, B.,M. Banikazemi, X. Shen, H. Franke, D.E. Poff, and T.B. Smith.Hardware compressed main memory: Operating system support and performance evaluation; T-C Nov 01 1219

Agarwal, A.,see Barua, R., T-C Nov 01 1234-1247

Aggarwal, C.C.,J.L. Wolf, and P.S. Yu.The maximum factor queue length batching scheme for video-on-demand systems; T-C Feb 01 97-110

Altman, E.,see Ebcioglu, K., T-C Jun 01 529-548

Amarasinghe, S.,see Barua, R., T-C Nov 01 1234-1247

Antola, A.,F. Ferrandi, V. Piuri, and M. Sami.Semiconcurrent error detection in data paths; T-C May 01 449-465

Arul, J.,see Kavi, K.M., T-C Aug 01 834-846

Atallah, M.J. On estimating the large entries of a convolution; T-C Mar 01 193-196

Austin, T.,see Reinman, G., T-C Apr 01 338-355

Aydin, H.,R. Melhem, D. Mosse, and P. Mejia-Alvarez.Optimal reward-based scheduling for periodic real-time tasks; T-C Feb 01 111-130

Ayguade, E.,see Llosa, J., T-C Mar 01 234-249

Ayguade, E.,see Lopez, D., T-C Oct 01 1033-1051

Aylor, J.H.,see Gang Han, T-C Sep 01 877-890

B

Baev, I.D.,see Meleis, W.M., T-C Aug 01 784-797

Banergee, P,see Kandemir, M., T-C Dec 01 1321-1336

Banikazemi, M.,see Aball, B., T-C Nov 01 1219

Baqar Zaidi, M.,see Johnson, E.E., T-C Feb 01 158-173

Barnes, R.D.,see Merten, M.C., T-C Jun 01 567-589

Barua, R.,W. Lee, S. Amarasinghe, and A. Agarwal.Compiler support for scalable and efficient memory systems; T-C Nov 01 1234-1247

Beaumont, O.,V. Boudet, A. Petitet, F. Rastello, and Y. Robert.A proposal for a heterogeneous cluster ScaLAPACK (dense linear solvers); T-C Oct 01 1052-1070

Bell, G.B.,see Lepak, K.M., T-C Nov 01 1174-1190

Benvemste, C.D.,P.A. Franaszek, and J.T. Robinson.Cache-memory interfaces in compressed memory systems; T-C Nov 01 1106-1116

Bernasconi, A.,B. Codenottl, and J.M. Vanderkam.A characterization of bent functions in terms of strongly regular graphs; T-C Sep 01 984-985

Bernat, G.,A. Burns, and A. Liamosi.Weakly hard real-time systems; T-C Apr 01 308-321

Bianchini, N.,S. Fanelli, and M. Gori.Optimal algorithms for well-conditioned nonlinear systems of equations; T-C Jul 01 689-698

Bin Wang, see Hung-Ying Tyan, T-C Mar 01 197-214

Blum, T.,and C. Paar.High-radix Montgomery modular exponentiation on reconfigurable hardware; T-C Jul 01 759-764

Bondavalli, A.,see Mura, I., T-C Dec 01 1337-1351

Boudet, V.,see Beaumont, O., T-C Oct 01 1052-1070

Brewer, F.,see Haynal, S., T-C Mar 01 250-267

Brown, B.D.,and H.C. Card.Stochastic neural computation. I. Computational elements; T-C Sep 01 891-905

Brown, B.D.,and H.C. Card.Stochastic neural computation. II. Soft competitive learning; T-C Sep 01 906-920

Burger, D.,see Lin, W.-F., T-C Nov 01 1202-1218

Burns, A.,see Bernat, G., T-C Apr 01 308-321

Butas, J.,see Chiu-Sing Choy, T-C Sep 01 992-997

Butler, J.T.,see Sasao, T., T-C Sep 01 935-948

C

Calder, B.,see Reinman, G., T-C Apr 01 338-355

Card, H.C.,see Brown, B.D., T-C Sep 01 891-905

Card, H.C.,see Brown, B.D., T-C Sep 01 906-920

Carter, J.B.,see Zhang, L., T-C Nov 01 1117-1132

Chan Cheong-Fat, see Chiu-Sing Choy, T-C Sep 01 992-997

Chansu Yu, see Sangman Moh, T-C Aug 01 811-823

Chao-Ju Hou, see Ching-Chih Han, T-C May 01 414-431

Chatterjee, A.,see Koppolu, S., T-C Feb 01 186-191

Chatterjee, A.,see Sasidhar, K., T-C Oct 01 1007-1019

Chattopadhyay, S.,see Dasgupta, P., T-C Feb 01 177-185

Chaudhuri, P.P.,see Dasgupta, P., T-C Feb 01 177-185

Chen, P.M.,see Ng, W.T., T-C Apr 01 322-337

Chen, S.-J.,see Yen, M.-H., T-C Nov 01 1291-1294

Chen Gen-Huey, see Sun-Yuan Hsieh, T-C Sep 01 960-971

Cheong-Fat Chan, see Chiu-Sing Choy, T-C Sep 01 992-997

Chessa, S.,and P. Maestrini.Correct and almost complete diagnosis of processor grids; T-C Oct 01 1095-1102

Chih-Fang Wang, and S. Sahni.Matrix multiplication on the OTIS-Mesh optoelectronic computer; T-C Jul 01 635-646

Chih-Wen Hsueh, and Kwei-Jay Lin.Scheduling real-time systems with end-to-end timing constraints using the distributed pinwheel model; T-C Jan 01 51-66

Childers, B.,see Hurson, A.R., T-C Aug 01 767-768

Ching-Chih Han, see Hung-Ying Tyan, T-C Mar 01 197-214

Ching-Chih Han, K.G. Shin, and Chao-Ju Hou.Synchronous bandwidth allocation for real-time communications with the timed-token MAC protocol; T-C May 01 414-431

Chin-Wen Ho, see Sun-Yuan Hsieh, T-C Sep 01 960-971

Chiou-Yng Lee, Erl-Huei Lu, and Jau-Yien Lee.Bit-parallel systolic multipliers for GF(2 m) fields defined by all-one and equally spaced polynomials; T-C May 01 385-393

Chiu-Sing Choy, J. Butas, J. Povazanic, and Cheong-Fat Chan.A new control circuit for asynchronous micropipelines; T-C Sep 01 992-997

Cho, Y.,see Lee, D., T-C Dec 01 1352-1361

Choi, J.,see Lee, D., T-C Dec 01 1352-1361

Choi Kyunghee, see Kyunghee Choi, T-C May 01 526-528

Choo Hyunseung, see Hee Yong Youn, T-C Apr 01 371-383

Choong Gun Oh, see Hee Yong Youn, T-C Apr 01 371-383

Cho Sangyeun, see Sangyeun Cho, T-C Jul 01 709-723

Choudhary, A.,see Kandemir, M., T-C Dec 01 1321-1336

Choy Chiu-Sing, see Chiu-Sing Choy, T-C Sep 01 992-997

Chung Jin-Wook, see Hee Yong Youn, T-C Apr 01 371-383

Codenottl, B.,see Bernasconi, A., T-C Sep 01 984-985

Codrescu, L.,D.S. Wills, and J. Meindl.Architecture of the Atlas chip-multiprocessor: dynamically parallelizing irregular applications; T-C Jan 01 67-82

Cohen, G.D.,L. Honkala, and A. Lobstein.On codes identifying vertices in the two-dimensional square lattice with diagonals; T-C Feb 01 174-176

Cortadella, J.,see Pastor, E., T-C May 01 432-448

Cuppu, V.,B. Jacob, B. Davis, and T. Mudge.High-performance DRAMs in workstation environments; T-C Nov 01 1133-1153

Cuyt, A.,and R.B. Lenin.Multivariate rational approximants for multiclass closed queuing networks; T-C Nov 01 1279-1288

D

Dasgupta, P.,S. Chattopadhyay, P.P. Chaudhuri, and I. Sengupta.Cellular automata-based recursive pseudoexhaustive test pattern generator; T-C Feb 01 177-185

Davidson, E.S.,see Tyson, G.S., T-C Aug 01 769-783

Davis, B.,see Cuppu, V., T-C Nov 01 1133-1153

Delaluz, V.,M. Kandemir, N. Vijaykrishnan, A. Sivasubramaniam, and M.J. Irwin.Hardware and software techniques for controlling DRAM power modes; T-C Nov 01 1154-1173

Deying Li, see Lu Ruan, T-C Jul 01 750-758

Diamantakos, G.,see Karagianni, K., T-C Jun 01 609-622

Dingzhu Du, see Lu Ruan, T-C Jul 01 750-758

Dongman Lee, see Hee Yong Youn, T-C Apr 01 371-383

Dongman Lee, see Sangman Moh, T-C Aug 01 811-823

Dongsoo Han, see Sangman Moh, T-C Aug 01 811-823

Drechsler, R.,see Jankovic, D., T-C Feb 01 147-157

Du Dingzhu, see Lu Ruan, T-C Jul 01 750-758

E

Ebcioglu, K.,E. Altman, M. Gschwind, and S. Sathaye.Dynamic binary translation and optimization; T-C Jun 01 529-548

Eckhardt, J.,see Llosa, J., T-C Mar 01 234-249

Eichenberger, A.E.,see Meleis, W.M., T-C Aug 01 784-797

Ercetin, O.,and L. Tassiulas.Push-based information delivery in two stage satellite-terrestrial wireless systems; T-C May 01 506-518

Erl-Huei Lu, see Chiou-Yng Lee, T-C May 01 385-393

F

Fanelli, S.,see Bianchini, N., T-C Jul 01 689-698

Fang, Z.,see Zhang, L., T-C Nov 01 1117-1132

Ferrandi, F.,see Antola, A., T-C May 01 449-465

Franaszek, P.A.,see Benvemste, C.D., T-C Nov 01 1106-1116

Franke, H.,see Aball, B., T-C Nov 01 1219

Franz, M.,see Kistler, T., T-C Jun 01 549-566

Fujita, M.,see Jaln, J., T-C Nov 01 1289-1290

G

Gang Han, R.H. Klenke, and J.H. Aylor.Performance modeling of hierarchical crossbar-based multicomputer systems; T-C Sep 01 877-890

Gen-Huey Chen, see Sun-Yuan Hsieh, T-C Sep 01 960-971

George, C.N.,see Merten, M.C., T-C Jun 01 567-589

Ghosh, S. P 2EDAS: asynchronous, distributed event driven simulation algorithm with inconsistent event preemption for accurate execution of VHDL descriptions on parallel processors; T-C Jan 01 28-50

Gihyun Jung, see Kyunghee Choi, T-C May 01 526-528

Giorgi, R.,see Kavi, K.M., T-C Aug 01 834-846

Goff, T.,see Phatak, D.S., T-C Nov 01 1267-1278

Gomez, G.,see Liu, Y.A., T-C Dec 01 1295-1309

Gong, W.-B.,see Liu, C., T-C Sep 01 997-1003

Gonzalez, A.,see Llosa, J., T-C Mar 01 234-249

Gonzalez, A.,see Parcerisa, J.-M., T-C Oct 01 1084-1094

Gonzalez, A.,see Gonzalez, J., T-C Dec 01 1362-1376

Gonzalez, J.,and A. Gonzalez.Control-flow speculation through value prediction; T-C Dec 01 1362-1376

Gori, M.,see Bianchini, N., T-C Jul 01 689-698

Gschwind, M.,see Ebcioglu, K., T-C Jun 01 529-548

Guan, D.J.,see Yu-Liang Liu, T-C May 01 500-505

Gun Oh Choong, see Hee Yong Youn, T-C Apr 01 371-383

Gyllenhaal, J.C.,see Merten, M.C., T-C Jun 01 567-589

Gyungho Lee, see Sangyeun Cho, T-C Jul 01 709-723

H

Hadlmloglu, H.,D. Kaeli, and F. Lombardi.Introduction to the special section on high performance memory systems; T-C Nov 01 1103-1104

Ha Jiheng, see Johnson, E.E., T-C Feb 01 158-173

Hamacher, V.C.,and Hong Jiang.Hierarchical ring network configuration and performance modeling; T-C Jan 01 1-12

Hamada, T.,see Kiniwa, J., T-C Sep 01 972-983

Han Ching-Chih, see Hung-Ying Tyan, T-C Mar 01 197-214

Han Ching-Chih, see Ching-Chih Han, T-C May 01 414-431

Han Dongsoo, see Sangman Moh, T-C Aug 01 811-823

Han Gang, see Gang Han, T-C Sep 01 877-890

Hasan, M.A. Power analysis attacks and algorithmic approaches to their countermeasures for Koblitz curve cryptosystems; T-C Oct 01 1071-1083

Haynal, S.,and F. Brewer.Automata-based symbolic scheduling for looping DFGs; T-C Mar 01 250-267

Hee Yong Youn, Choong Gun Oh, Hyunseung Choo, Jin-Wook Chung, and Dongman Lee.An efficient algorithm-based fault tolerance design using the weighted data-check relationship; T-C Apr 01 371-383

Hee Yong Youn, see Sangman Moh, T-C Aug 01 811-823

Ho Chin-Wen, see Sun-Yuan Hsieh, T-C Sep 01 960-971

Hong, S.,see Ryu, M., T-C Dec 01 1310-1320

Hong Jiang, see Hamacher, V.C., T-C Jan 01 1-12

Honkala, L.,see Cohen, G.D., T-C Feb 01 174-176

Hou, J.C.,see Hung-Ying Tyan, T-C Mar 01 197-214

Hou Chao-Ju, see Ching-Chih Han, T-C May 01 414-431

Hsieh, W.C.,see Zhang, L., T-C Nov 01 1117-1132

Hsieh Sun-Yuan, see Sun-Yuan Hsieh, T-C Sep 01 960-971

Hsueh Chih-Wen, see Chih-Wen Hsueh, T-C Jan 01 51-66

Hu, V.,see Min, R., T-C Nov 01 1191-1201

Hung-Ying Tyan, J.C. Hou, Bin Wang, and Ching-Chih Han.On supporting temporal quality of service in WDMA-based star-coupled optical networks; T-C Mar 01 197-214

Hurson, A.R.,and B. Childers.Message from the guest editors [intro. to the special issue on Parallel Architecture and Compilation Techniques Conference]; T-C Aug 01 767-768

Hu Xiaodong, see Lu Ruan, T-C Jul 01 750-758

Hwu, W.-M.W.,see Merten, M.C., T-C Jun 01 567-589

Hyunseung Choo, see Hee Yong Youn, T-C Apr 01 371-383

I

Irwin, M.J.,see Delaluz, V., T-C Nov 01 1154-1173

J

Jacob, B.,and T. Mudge.Uniprocessor virtual memory without TLBs; T-C May 01 482-499

Jacob, B.,see Cuppu, V., T-C Nov 01 1133-1153

Jaln, J.,I. Wegener, and M. Fujita.A note on complexity of OBDD composition and efficiency of partitioned-OBDDs over OBDDs; T-C Nov 01 1289-1290

Jankovic, D.,R.S. Stankovic, and R. Drechsler.Decision diagram method for calculation of pruned Walsh transform; T-C Feb 01 147-157

Jau-Yien Lee, see Chiou-Yng Lee, T-C May 01 385-393

Jianchao Wang, see Yuanyuan Yang, T-C Oct 01 1020-1032

Jiang Hong, see Hamacher, V.C., T-C Jan 01 1-12

Jia Xiaohua, see Lu Ruan, T-C Jul 01 750-758

Jie Mi, see Yibei Ling, T-C Jul 01 699-708

Jiheng Ha, see Johnson, E.E., T-C Feb 01 158-173

Jin-Wook Chung, see Hee Yong Youn, T-C Apr 01 371-383

John, L.K.,see Radhakrishnan, R., T-C Feb 01 131-146

John, L.K.,see Tao Li, T-C Sep 01 921-934

Johnson, E.E.,Jiheng Ha, and M. Baqar Zaidi.Lossless trace compression; T-C Feb 01 158-173

Jung Gihyun, see Kyunghee Choi, T-C May 01 526-528

Junhyung Um, and Taewhan Kim.An optimal allocation of carry-save-adders in arithmetic circuits; T-C Mar 01 215-233

K

Kaeli, D.,see Hadlmloglu, H., T-C Nov 01 1103-1104

Kandemir, M.,and J. Ramanujam.Data relation vectors: a new abstraction for data optimizations; T-C Aug 01 798-810

Kandemir, M.,see Delaluz, V., T-C Nov 01 1154-1173

Kandemir, M.,J. Ramanujam, A. Choudhary, and P Banergee.A layout-conscious iteration space transformation technique; T-C Dec 01 1321-1336

Karagianni, K.,V. Paliouras, G. Diamantakos, and T. Stouraitis.Operation-saving VLSI architectures for 3D geometrical transformations; T-C Jun 01 609-622

Kavi, K.M.,R. Giorgi, and J. Arul.Scheduled dataflow: execution paradigm, architecture, and performance evaluation; T-C Aug 01 834-846

Keqin Li, and V.Y. Pan.Parallel matrix multiplication on a linear array with a reconfigurable pipelined bus system; T-C May 01 519-525

Kim, C.S.,see Lee, D., T-C Dec 01 1352-1361

Kim, J.-H.,see Lee, D., T-C Dec 01 1352-1361

Kim Taewhan, see Junhyung Um, T-C Mar 01 215-233

Kiniwa, J.,T. Hamada, and D. Mizoguchi.Lookahead scheduling requests for multisize page caching; T-C Sep 01 972-983

Kistler, T.,and M. Franz.Continuous program optimization: Design and evaluation; T-C Jun 01 549-566

Klenke, R.H.,see Gang Han, T-C Sep 01 877-890

Koc, C.K.,see Sunar, B., T-C Jan 01 83-87

Kogge, P.M.,see Zyuban, V.V., T-C Mar 01 268-285

Koppolu, S.,and A. Chatterjee.Hierarchical diagnosis of identical units in a system; T-C Feb 01 186-191

Koren, I.,see Phatak, D.S., T-C Nov 01 1267-1278

Krishna, C.M.,see Liu, C., T-C Sep 01 997-1003

Kumar, D.R.,W.A. Najjar, and P.K. Srimani.A new adaptive hardware tree-based multicast routing in k-ary n-cubes; T-C Jul 01 647-659

Kuo Tei-Wei, see Tei-Wei Kuo, T-C Jul 01 660-673

Kwei-Jay Lin, see Chih-Wen Hsueh, T-C Jan 01 51-66

Kyunghee Choi, and Gihyun Jung.Comment on "On-line scheduling policies for a class of IRIS real-time tasks"; T-C May 01 526-528

L

Lan, S.H.,see Yen, M.-H., T-C Nov 01 1291-1294

Lang, T.,see Montuschi, P., T-C Jan 01 13-27

Lee, B.,see Sangman Moh, T-C Aug 01 811-823

Lee, D.,J. Choi, J.-H. Kim, S.H. Noh, S.L. Min, Y. Cho, and C.S. Kim.LRFU: A spectrum of policies that subsumes the least recently used and least frequently used policies; T-C Dec 01 1352-1361

Lee, J.,and D.A. Padua.Hiding relaxed memory consistency with a compiler; T-C Aug 01 824-833

Lee, J,see Solihin, Y., T-C Nov 01 1248-1266

Lee, W.,see Barua, R., T-C Nov 01 1234-1247

Lee Chiou-Yng, see Chiou-Yng Lee, T-C May 01 385-393

Lee Dongman, see Hee Yong Youn, T-C Apr 01 371-383

Lee Dongman, see Sangman Moh, T-C Aug 01 811-823

Lee Gyungho, see Sangyeun Cho, T-C Jul 01 709-723

Lee Jau-Yien, see Chiou-Yng Lee, T-C May 01 385-393

Lee Sang-Jeong, see Sang-Jeong Lee, T-C Aug 01 847-852

Lenin, R.B.,see Cuyt, A., T-C Nov 01 1279-1288

Lepak, K.M.,G.B. Bell, and M.H. Upasti.Silent stores and store value locality; T-C Nov 01 1174-1190

Liamosi, A.,see Bernat, G., T-C Apr 01 308-321

Liang Ming-Chung, see Tei-Wei Kuo, T-C Jul 01 660-673

Li Deying, see Lu Ruan, T-C Jul 01 750-758

LihChyun Shu, see Tei-Wei Kuo, T-C Jul 01 660-673

Li Keqin, see Keqin Li, T-C May 01 519-525

Lin, W.-F.,S.K. Reinhardt, and D. Burger.Designing a modern memory hierarchy with hardware prefetching; T-C Nov 01 1202-1218

Ling Yibei, see Yibei Ling, T-C Jul 01 699-708

Lin Kwei-Jay, see Chih-Wen Hsueh, T-C Jan 01 51-66

Lin Xiaola, see Yibei Ling, T-C Jul 01 699-708

Lin Yi-Bing, see Yi-Bing Lin, T-C Apr 01 356-370

Li Tao, see Tao Li, T-C Sep 01 921-934

Liu, C.,W.-B. Gong, and C.M. Krishna.Rational interpolation examples in performance analysis; T-C Sep 01 997-1003

Liu, Y.A.,and G. Gomez.Automatic accurate cost-bound analysis for high-level languages; T-C Dec 01 1295-1309

Liu Yu-Liang, see Yu-Liang Liu, T-C May 01 500-505

Llosa, J.,E. Ayguade, A. Gonzalez, M. Valero, and J. Eckhardt.Lifetime-sensitive modulo scheduling in a production environment; T-C Mar 01 234-249

Llosa, J.,see Lopez, D., T-C Oct 01 1033-1051

Lobstein, A.,see Cohen, G.D., T-C Feb 01 174-176

Lombardi, F.,see Hadlmloglu, H., T-C Nov 01 1103-1104

Lopes, L.,V.T. Vasconcelos, and F. Silva.Fine-grained multithreading with process calculi; T-C Aug 01 852-862

Lopez, D.,J. Llosa, M. Valero, and E. Ayguade.Cost-conscious strategies to increase performance of numerical programs on aggressive VLIW architectures; T-C Oct 01 1033-1051

Lu Erl-Huei, see Chiou-Yng Lee, T-C May 01 385-393

Lumetta, S.S.,see Patel, S.J., T-C Jun 01 590-608

Lu Ruan, Dingzhu Du, Xiaodong Hu, Xiaohua Jia, Deying Li, and Zheng Sun.Converter placement supporting broadcast in WDM optical networks; T-C Jul 01 750-758

M

Mackenzie, L.M.,see Sarbazi-Azad, H., T-C Jul 01 623-634

Maestrini, P.,see Chessa, S., T-C Oct 01 1095-1102

Mahevas, S.,and G. Rubino.Bound computation of dependability and performance measures; T-C May 01 399-413

Mathew, B.K.,see Zhang, L., T-C Nov 01 1117-1132

McKee, S.A.,see Zhang, L., T-C Nov 01 1117-1132

Meindl, J.,see Codrescu, L., T-C Jan 01 67-82

Mejia-Alvarez, P.,see Aydin, H., T-C Feb 01 111-130

Meleis, W.M.,A.E. Eichenberger, and I.D. Baev.Scheduling superblocks with bound-based branch trade-offs; T-C Aug 01 784-797

Melhem, R.,see Aydin, H., T-C Feb 01 111-130

Melliar-Smith, P.M.,see Shum, A., T-C May 01 466-481

Merten, M.C.,A.R. Trick, R.D. Barnes, E.M. Nystrom, C.N. George, J.C. Gyllenhaal, and W.-M.W. Hwu.An architectural framework for runtime optimization; T-C Jun 01 567-589

Meyer, J.F. Performability of an algorithm for connection admission control; T-C Jul 01 724-733

Mi Jie, see Yibei Ling, T-C Jul 01 699-708

Min, R.,and V. Hu.Improving performance of large physically indexed caches by decoupling memory addresses from cache addresses; T-C Nov 01 1191-1201

Min, S.L.,see Lee, D., T-C Dec 01 1352-1361

Ming-Chung Liang, see Tei-Wei Kuo, T-C Jul 01 660-673

Mizoguchi, D.,see Kiniwa, J., T-C Sep 01 972-983

Moh Sangman, see Sangman Moh, T-C Aug 01 811-823

Montuschi, P.,and T. Lang.Boosting very-high radix division with prescaling and selection by rounding; T-C Jan 01 13-27

Moser, L.E.,see Shum, A., T-C May 01 466-481

Mosse, D.,see Aydin, H., T-C Feb 01 111-130

Mudge, T.,see Jacob, B., T-C May 01 482-499

Mudge, T.,see Cuppu, V., T-C Nov 01 1133-1153

Mukherjee, N.,J. Rajski, and J. Tyszer.Testing schemes for FIR filter structures; T-C Jul 01 674-688

Mura, I.,and A. Bondavalli.Markov regenerative stochastic Petri nets to model and evaluate phased mission systems dependability; T-C Dec 01 1337-1351

N

Najjar, W.A.,see Kumar, D.R., T-C Jul 01 647-659

Ng, W.T.,and P.M. Chen.The design and verification of the Rio file cache; T-C Apr 01 322-337

Noh, S.H.,see Lee, D., T-C Dec 01 1352-1361

Nystrom, E.M.,see Merten, M.C., T-C Jun 01 567-589

O

Oh Choong Gun, see Hee Yong Youn, T-C Apr 01 371-383

Olukotun, K.,see Wilson, K.M., T-C Apr 01 292-307

Ould-Khaoua, M.,see Sarbazi-Azad, H., T-C Jul 01 623-634

P

Paar, C.,see Blum, T., T-C Jul 01 759-764

Padua, D.A.,see Lee, J., T-C Aug 01 824-833

Paliouras, V.,see Karagianni, K., T-C Jun 01 609-622

Pan, V.Y.,see Keqin Li, T-C May 01 519-525

Parcerisa, J.-M.,and A. Gonzalez.Improving latency tolerance of multithreading through decoupling; T-C Oct 01 1084-1094

Parhi, K.K.,see Tong Zhang, T-C Jul 01 734-749

Park, J.,see Ryu, M., T-C Dec 01 1310-1320

Parker, M.,see Zhang, L., T-C Nov 01 1117-1132

Pastor, E.,J. Cortadella, and O. Roig.Symbolic analysis of bounded Petri nets; T-C May 01 432-448

Patel, S.J.,and S.S. Lumetta.rePLay: A hardware framework for dynamic optimization; T-C Jun 01 590-608

Pen-Chung Yew, see Sangyeun Cho, T-C Jul 01 709-723

Pen-Chung Yew, see Sang-Jeong Lee, T-C Aug 01 847-852

Petitet, A.,see Beaumont, O., T-C Oct 01 1052-1070

Phatak, D.S.,T. Goff, and I. Koren.Constant-time addition and simultaneous format conversion based on redundant binary representations; T-C Nov 01 1267-1278

Piuri, V.,see Antola, A., T-C May 01 449-465

Poff, D.E.,see Aball, B., T-C Nov 01 1219

Povazanic, J.,see Chiu-Sing Choy, T-C Sep 01 992-997

R

Radhakrishnan, R.,N. Vijaykrishnan, L.K. John, A. Sivasubramaniam, J. Rubio, and J. Sabarinathan.Java runtime systems: characterization and architectural implications; T-C Feb 01 131-146

Rajski, J.,see Mukherjee, N., T-C Jul 01 674-688

Ramanujam, J.,see Kandemir, M., T-C Aug 01 798-810

Ramanujam, J.,see Kandemir, M., T-C Dec 01 1321-1336

Rastello, F.,see Beaumont, O., T-C Oct 01 1052-1070

Reinhardt, S.K.,see Lin, W.-F., T-C Nov 01 1202-1218

Reinman, G.,B. Calder, and T. Austin.Optimizations enabled by a decoupled front-end architecture; T-C Apr 01 338-355

Rescigno, A.A. Optimally balanced spanning tree of the star network; T-C Jan 01 88-91

Robert, Y.,see Beaumont, O., T-C Oct 01 1052-1070

Robinson, J.T.,see Benvemste, C.D., T-C Nov 01 1106-1116

Roig, O.,see Pastor, E., T-C May 01 432-448

Ruan Lu, see Lu Ruan, T-C Jul 01 750-758

Rubino, G.,see Mahevas, S., T-C May 01 399-413

Rubio, J.,see Radhakrishnan, R., T-C Feb 01 131-146

Ryu, M.,J. Park, and S. Hong.Timing constraint remapping to achieve time equi-continuity in distributed real-time systems; T-C Dec 01 1310-1320

S

Sabarinathan, J.,see Radhakrishnan, R., T-C Feb 01 131-146

Sahni, S.,see Chih-Fang Wang, T-C Jul 01 635-646

Sami, M.,see Antola, A., T-C May 01 449-465

Sang-Jeong Lee, and Pen-Chung Yew.On table bandwidth and its update delay for value prediction on wide-issue ILP processors; T-C Aug 01 847-852

Sangman Moh, Chansu Yu, B. Lee, Hee Yong Youn, Dongsoo Han, and Dongman Lee.Four-ary tree-based barrier synchronization for 2D meshes without nonmember involvement; T-C Aug 01 811-823

Sangyeun Cho, Pen-Chung Yew, and Gyungho Lee.A high-bandwidth memory pipeline for wide issue processors; T-C Jul 01 709-723

Sarbazi-Azad, H.,M. Ould-Khaoua, and L.M. Mackenzie.Analytical modeling of wormhole-routed k-ary n-cubes in the presence of hot-spot traffic; T-C Jul 01 623-634

Sasao, T.,and J.T. Butler.Worst and best irredundant sum-of-products expressions; T-C Sep 01 935-948

Sasidhar, K.,A. Chatterjee, and Y. Zorian.Boundary scan-based relay wave propagation test of arrays of identical structures; T-C Oct 01 1007-1019

Sathaye, S.,see Ebcioglu, K., T-C Jun 01 529-548

Schaelicke, L.,see Zhang, L., T-C Nov 01 1117-1132

Schwiebert, L. Deadlock-free oblivious wormhole routing with cyclic dependencies; T-C Sep 01 865-876

Sengupta, I.,see Dasgupta, P., T-C Feb 01 177-185

Shen, X.,see Aball, B., T-C Nov 01 1219

Shin, K.G.,see Ching-Chih Han, T-C May 01 414-431

Shu LihChyun, see Tei-Wei Kuo, T-C Jul 01 660-673

Shum, A.,P.M. Melliar-Smith, and L.E. Moser.Design and evaluation of the Fibonacci optical ATM switch; T-C May 01 466-481

Silva, F.,see Lopes, L., T-C Aug 01 852-862

Sivasubramaniam, A.,see Radhakrishnan, R., T-C Feb 01 131-146

Sivasubramaniam, A.,see Delaluz, V., T-C Nov 01 1154-1173

Smelyanskiy, M.,see Tyson, G.S., T-C Aug 01 769-783

Smith, T.B.,see Aball, B., T-C Nov 01 1219

Solihin, Y.,J Lee, and J. Torrellas.Automatic code mapping on an intelligent memory architecture; T-C Nov 01 1248-1266

Srimani, P.K.,see Kumar, D.R., T-C Jul 01 647-659

Stankovic, R.S.,see Jankovic, D., T-C Feb 01 147-157

Stouraitis, T.,see Karagianni, K., T-C Jun 01 609-622

Sunar, B.,and C.K. Koc.An efficient optimal normal basis type II multiplier; T-C Jan 01 83-87

Sungwook Yu, and E.E. Swartziander, Jr.DCT implementation with distributed arithmetic; T-C Sep 01 985-991

Sun-Yuan Hsieh, Gen-Huey Chen, and Chin-Wen Ho.Longest fault-free paths in star graphs with edge faults; T-C Sep 01 960-971

Sun Zheng, see Lu Ruan, T-C Jul 01 750-758

Swartziander, Jr.,E.E.,see Sungwook Yu, T-C Sep 01 985-991

T

Taewhan Kim, see Junhyung Um, T-C Mar 01 215-233

Takagi, K.,see Takagi, N., T-C May 01 394-398

Takagi, N.,J. Yoshiki, and K. Takagi.A fast algorithm for multiplicative inversion in GF(2 m) using normal basis; T-C May 01 394-398

Tao Li, and L.K. John.ADir pNB: a cost-effective way to implement full map directory-based cache coherence protocols; T-C Sep 01 921-934

Tassiulas, L.,see Ercetin, O., T-C May 01 506-518

Tei-Wei Kuo, Ming-Chung Liang, and LihChyun Shu.Abort-oriented concurrency control for real-time databases; T-C Jul 01 660-673

Tong Zhang, and K.K. Parhi.Systematic design of original and modified Mastrovito multipliers for general irreducible polynomials; T-C Jul 01 734-749

Torrellas, J.,see Solihin, Y., T-C Nov 01 1248-1266

Trick, A.R.,see Merten, M.C., T-C Jun 01 567-589

Tyan Hung-Ying, see Hung-Ying Tyan, T-C Mar 01 197-214

Tyson, G.S.,M. Smelyanskiy, and E.S. Davidson.Evaluating the use of register queues in software pipelined loops; T-C Aug 01 769-783

Tyszer, J.,see Mukherjee, N., T-C Jul 01 674-688

U

Um Junhyung, see Junhyung Um, T-C Mar 01 215-233

Upasti, M.H.,see Lepak, K.M., T-C Nov 01 1174-1190

V

Valero, M.,see Llosa, J., T-C Mar 01 234-249

Valero, M.,see Lopez, D., T-C Oct 01 1033-1051

Vanderkam, J.M.,see Bernasconi, A., T-C Sep 01 984-985

Vasconcelos, V.T.,see Lopes, L., T-C Aug 01 852-862

Vijaykrishnan, N.,see Radhakrishnan, R., T-C Feb 01 131-146

Vijaykrishnan, N.,see Delaluz, V., T-C Nov 01 1154-1173

W

Wang Bin, see Hung-Ying Tyan, T-C Mar 01 197-214

Wang Chih-Fang, see Chih-Fang Wang, T-C Jul 01 635-646

Wang Jianchao, see Yuanyuan Yang, T-C Oct 01 1020-1032

Wang Yue-Li, see Yu-Liang Liu, T-C May 01 500-505

Wegener, I.,see Jaln, J., T-C Nov 01 1289-1290

Wilkes, M.V. High performance memory systems; T-C Nov 01 1105-1106

Wills, D.S.,see Codrescu, L., T-C Jan 01 67-82

Wilson, K.M.,and K. Olukotun.High bandwidth on-chip cache design; T-C Apr 01 292-307

Wolf, J.L.,see Aggarwal, C.C., T-C Feb 01 97-110

X

Xiaodong Hu,see Lu Ruan, T-C Jul 01 750-758

Xiaohua Jia,see Lu Ruan, T-C Jul 01 750-758

Xiaola Lin,see Yibei Ling, T-C Jul 01 699-708

Y

Yang Yuanyuan,see Yuanyuan Yang, T-C Oct 01 1020-1032

Yen, M.-H.,S.-J. Chen, and S.H. Lan.A three-stage one-sided rearrangeable polygonal switching network; T-C Nov 01 1291-1294

Yeung, K.H.,and T.S. Yum.Dynamic multiple parity (DMP) disk array for serial transaction processing; T-C Sep 01 949-959

Yew Pen-Chung,see Sangyeun Cho, T-C Jul 01 709-723

Yew Pen-Chung,see Sang-Jeong Lee, T-C Aug 01 847-852

Yibei Ling,Jie Mi, and Xiaola Lin.A variational calculus approach to optimal checkpoint placement; T-C Jul 01 699-708

Yi-Bing Lin Eliminating overflow for large-scale mobility databases in cellular telephone networks; T-C Apr 01 356-370

Yong Youn Hee, see Hee Yong Youn, T-C Apr 01 371-383

Yong Youn Hee, see Sangman Moh, T-C Aug 01 811-823

Yoshiki, J.,see Takagi, N., T-C May 01 394-398

Youn Hee Yong, see Hee Yong Youn, T-C Apr 01 371-383

Youn Hee Yong, see Sangman Moh, T-C Aug 01 811-823

Yu, P.S.,see Aggarwal, C.C., T-C Feb 01 97-110

Yuanyuan Yang, and Jianchao Wang.Pipelined all-to-all broadcast in all-port meshes and tori; T-C Oct 01 1020-1032

Yu Chansu, see Sangman Moh, T-C Aug 01 811-823

Yue-Li Wang, see Yu-Liang Liu, T-C May 01 500-505

Yu-Liang Liu, Yue-Li Wang, and D.J. Guan.An optimal fault-tolerant routing algorithm for double-loop networks; T-C May 01 500-505

Yum, T.S.,see Yeung, K.H., T-C Sep 01 949-959

Yu Sungwook, see Sungwook Yu, T-C Sep 01 985-991

Z

Zhang, L.,Z. Fang, M. Parker, B.K. Mathew, L. Schaelicke, J.B. Carter, W.C. Hsieh, and S.A. McKee.The impulse memory controller; T-C Nov 01 1117-1132

Zhang Tong, see Tong Zhang, T-C Jul 01 734-749

Zheng Sun, see Lu Ruan, T-C Jul 01 750-758

Zorian, Y.,see Sasidhar, K., T-C Oct 01 1007-1019

Zyuban, V.V.,and P.M. Kogge.Inherently lower-power high-performance superscalar architectures; T-C Mar 01 268-285

SUBJECT INDEX

A
Access protocols

timed-token MAC protocol, sync. bandwidth allocation for real-time commun. Ching-Chih Han, + , T-C May 01 414-431

Access protocols;
see Time division multiple access
Adaptive systems

automatic code mapping on intelligent memory architecture. Solihin, Y., + , T-C Nov 01 1248-1266

Adders

constant-time addition and simultaneous format conversion based on redundant binary representations. Phatak, D.S., + , T-C Nov 01 1267-1278

optimal allocation of carry-save-adders in arith. ccts. Junhyung Um, + , T-C Mar 01 215-233

Algebra;
see Galois fields; Polynomials; Process algebra
Algorithm theory;
see Computational complexity
Approximation theory

multivariate rational approximants for multiclass closed queuing networks. Cuyt, A., + , T-C Nov 01 1279-1288

Arithmetic;
see Digital arithmetic
Asynchronous circuits

control cct. for asynchronous micropipelines. Chiu-Sing Choy, + , T-C Sep 01 992-997

Asynchronous transfer mode

Fibonacci opt. ATM switch, design and eval. Shum, A., + , T-C May 01 466-481

Automata theory

looping DFGs, automata-based symbolic scheduling. Haynal, S., + , T-C Mar 01 250-267

B
Bandwidth allocation

timed-token MAC protocol, sync. bandwidth allocation for real-time commun. Ching-Chih Han, + , T-C May 01 414-431

Binary decision diagrams

pruned Walsh transform, decision diag. method. Jankovic, D., + , T-C Feb 01 147-157

symbolic anal. of bounded Petri nets. Pastor, E., + , T-C May 01 432-448

Block codes;
see Hamming codes
Boolean algebra;
see Boolean functions
Boolean functions

bent fns. characterization in terms of strongly regular graphs. Bernasconi, A., + , T-C Sep 01 984-985

complexity of OBDD composition and efficiency of partitioned-OBDDs over OBDDs. Jaln, J., + , T-C Nov 01 1289-1290

symbolic anal. of bounded Petri nets. Pastor, E., + , T-C May 01 432-448

Boundary scan testing

identical struct. arrays, boundary scan-based relay wave propag. test. Sasidhar, K., + , T-C Oct 01 1007-1019

Broadband networks

connection admission control, performability. Meyer, J.F., T-C Jul 01 724-733

Buffer storage

designing memory hierarchy with hardware prefetching. Lin, W.-F., + , T-C Nov 01 1202-1218

Buffer storage;
see Cache storage
Built-in self test

recursive pseudoexhaustive test pattern generator, cellular automata-based. Dasgupta, P., + , T-C Feb 01 177-185

C
Cache storage

ADir pNB, full map directory-based cache coherence protocols. Tao Li, + , T-C Sep 01 921-934

cache-memory interfaces in compressed memory systems. Benvemste, C.D., + , T-C Nov 01 1106-1116

hardware compressed main memory; operating system support and performance evaluation. Aball, B., + , T-C Nov 01 1219

hierarchical ring network, config./perform. modeling. Hamacher, V.C., + , T-C Jan 01 1-12

high bandwidth on-chip cache design. Wilson, K.M., + , T-C Apr 01 292-307

high performance memory systems (special section). T-C Nov 01 1103-1166

high performance memory systems (special section intro.). Hadlmloglu, H., + , T-C Nov 01 1103-1104

improving performance of large physically indexed caches by decoupling memory addresses from cache addresses. Min, R., + , T-C Nov 01 1191-1201

impulse memory controller. Zhang, L., + , T-C Nov 01 1117-1132

lookahead scheduling requests for multisize page caching. Kiniwa, J., + , T-C Sep 01 972-983

LRFU; spectrum of policies that subsumes least recently used and least frequently used policies. Lee, D., + , T-C Dec 01 1352-1361

Rio file cache, design and verification. Ng, W.T., + , T-C Apr 01 322-337

silent stores and store value locality. Lepak, K.M., + , T-C Nov 01 1174-1190

uniprocessor virtual memory without translation lookaside buffers. Jacob, B., + , T-C May 01 482-499

Calculus;
see Variational techniques
Capacity management (computers)

high-performance DRAMs in workstation environments. Cuppu, V., + , T-C Nov 01 1133-1153

impulse memory controller. Zhang, L., + , T-C Nov 01 1117-1132

Carry logic

optimal allocation of carry-save-adders in arith. ccts. Junhyung Um, + , T-C Mar 01 215-233

Cellular arrays;
see Systolic arrays
Cellular automata

recursive pseudoexhaustive test pattern generator, cellular automata-based. Dasgupta, P., + , T-C Feb 01 177-185

Cellular radio

large-scale mobility databases in cellular telephone networks, overflow elimination. Yi-Bing Lin, T-C Apr 01 356-370

Channel capacity

connection admission control, performability. Meyer, J.F., T-C Jul 01 724-733

Circuit analysis computing

boundary scan-based relay wave propag. test of arrays of identical struct. Sasidhar, K., + , T-C Oct 01 1007-1019

Circuit CAD;
see Hardware description languages
Circuit complexity

semiconcurrent error detect. in data paths. Antola, A., + , T-C May 01 449-465

Codes;
see Error correction codes
Combinational circuits

digital FIR filters, testing schemes. Mukherjee, N., + , T-C Jul 01 674-688

Combinatorial mathematics;
see Graph theory
Compiler generators

automatic code mapping on intelligent memory architecture. Solihin, Y., + , T-C Nov 01 1248-1266

compiler support for scalable and efficient memory systems. Barua, R., + , T-C Nov 01 1234-1247

Computational complexity

GF, type II multiplier. Sunar, B., + , T-C Jan 01 83-87

heterog. cluster scaLAPACK, dense lin. solvers. Beaumont, O., + , T-C Oct 01 1052-1070

Mastrovito multipliers for general irreducible polynomials, systematic design. Tong Zhang, + , T-C Jul 01 734-749

optimal algms. for well-conditioned nonlin. systs. of eqns. Bianchini, N., + , T-C Jul 01 689-698

optimal reward-based scheduling for periodic real-time tasks. Aydin, H., + , T-C Feb 01 111-130

parallel matrix multiplication on lin. array with, reconfigurable pipelined bus syst. Keqin Li, + , T-C May 01 519-525

relax. memory consistency hiding with compiler. Lee, J., + , T-C Aug 01 824-833

scheduled dataflow, execution paradigm, archit., and perform. eval. Kavi, K.M., + , T-C Aug 01 834-846

scheduling policies for class of IRIS real-time tasks. Kyunghee Choi, + , T-C May 01 526-528

timed-token MAC protocol, sync. bandwidth allocation for real-time commun. Ching-Chih Han, + , T-C May 01 414-431

wide issue proc., high-bandwidth memory pipeline. Sangyeun Cho, + , T-C Jul 01 709-723

Computational complexity;
see Circuit complexity
Computational geometry

optimal fault-tolerant routing algm. for double-loop networks. Yu-Liang Liu, + , T-C May 01 500-505

Computation theory;
see Automata theory
Computer aided analysis;
see Digital simulation
Computer architecture

decoupled front-end archit., optim. enabled. Reinman, G., + , T-C Apr 01 338-355

high performance memory systems (special section). T-C Nov 01 1103-1166

high performance memory systems (special section intro.). Hadlmloglu, H., + , T-C Nov 01 1103-1104

lower-power high-perform. superscalar archits. Zyuban, V.V., + , T-C Mar 01 268-285

rePLay, hardware framework for dyn. optim. Patel, S.J., + , T-C Jun 01 590-608

Computer architecture;
see Memory architecture; Parallel architectures; Reconfigurable architectures
Computer debugging

hierarchical diagnosis of identical units in syst. Koppolu, S., + , T-C Feb 01 186-191

Computer interfaces;
see System buses
Computer networks

optimal fault-tolerant routing algm. for double-loop networks. Yu-Liang Liu, + , T-C May 01 500-505

two-stage satellite-terrestrial wireless systs., push-based inform. delivery. Ercetin, O., + , T-C May 01 506-518

Computer peripheral equipment;
see Digital storage
Computer testing

hierarchical diagnosis of identical units in syst. Koppolu, S., + , T-C Feb 01 186-191

Concurrency control

abort-oriented concurrency control for real-time databases. Tei-Wei Kuo, + , T-C Jul 01 660-673

deadlock-free oblivious wormhole routing with cyclic dependencies. Schwiebert, L., T-C Sep 01 865-876

Content-addressable storage

ADir pNB, full map directory-based cache coherence protocols. Tao Li, + , T-C Sep 01 921-934

Control equipment;
see Controllers
Controllers

impulse memory controller. Zhang, L., + , T-C Nov 01 1117-1132

Convolution

estimating large entries of convolution. Atallah, M.J., T-C Mar 01 193-196

multivariate rational approximants for multiclass closed queuing networks. Cuyt, A., + , T-C Nov 01 1279-1288

Cost-benefit analysis

automatic accurate cost-bound analysis for high-level languages. Liu, Y.A., + , T-C Dec 01 1295-1309

Costing;
see Software cost estimation
Cryptography

fast algm. for multiplicative inversion in GF(2 m) using normal basis. Takagi, N., + , T-C May 01 394-398

high-radix Montgomery modular exponentiation on reconfigurable hardware. Blum, T., + , T-C Jul 01 759-764

Koblitz curve cryptosystem countermeasures, power anal. attacks. Hasan, M.A., T-C Oct 01 1071-1083

D
Database management systems

abort-oriented concurrency control for real-time databases. Tei-Wei Kuo, + , T-C Jul 01 660-673

large-scale mobility databases in cellular telephone networks, overflow elimination. Yi-Bing Lin, T-C Apr 01 356-370

Database management systems;
see Distributed databases
Data communication equipment;
see Network computers
Data compression

DCT implement. with distributed arith. Sungwook Yu, + , T-C Sep 01 985-991

lossless trace compression. Johnson, E.E., + , T-C Feb 01 158-173

Data flow computing

scheduled dataflow, execution paradigm, archit., and perform. eval. Kavi, K.M., + , T-C Aug 01 834-846

Data flow graphs

looping DFGs, automata-based symbolic scheduling. Haynal, S., + , T-C Mar 01 250-267

semiconcurrent error detect. in data paths. Antola, A., + , T-C May 01 449-465

Data handling;
see Symbol manipulation
Data integrity

abort-oriented concurrency control for real-time databases. Tei-Wei Kuo, + , T-C Jul 01 660-673

Data structures

continuous program optim., design and eval. Kistler, T., + , T-C Jun 01 549-566

data rel. vectors, abstraction for data optim. Kandemir, M., + , T-C Aug 01 798-810

symbolic anal. of bounded Petri nets. Pastor, E., + , T-C May 01 432-448

Decision diagrams

complexity of OBDD composition and efficiency of partitioned-OBDDs over OBDDs. Jaln, J., + , T-C Nov 01 1289-1290

Decision diagrams;
see Binary decision diagrams
Decision trees

control-flow speculation through value prediction. Gonzalez, J., + , T-C Dec 01 1362-1376

Delay circuits;
see Delay lines
Delay lines

Fibonacci opt. ATM switch, design and eval. Shum, A., + , T-C May 01 466-481

Delays

real-time syst., scheduling, distributed pinwheel model. Chih-Wen Hsueh, + , T-C Jan 01 51-66

Design for testability

boundary scan-based relay wave propag. test of arrays of identical struct. Sasidhar, K., + , T-C Oct 01 1007-1019

Diagrams;
see Decision diagrams
Digital arithmatic

constant-time addition and simultaneous format conversion based on redundant binary representations. Phatak, D.S., + , T-C Nov 01 1267-1278

Digital arithmetic

bit-parallel systolic multipliers for GF(2 m) fields defined by all-one and equally spaced polynomials. Chiou-Yng Lee, + , T-C May 01 385-393

GF, type II multiplier. Sunar, B., + , T-C Jan 01 83-87

Koblitz curve cryptosystem countermeasures, power anal. attacks. Hasan, M.A., T-C Oct 01 1071-1083

Mastrovito multipliers for general irreducible polynomials, systematic design. Tong Zhang, + , T-C Jul 01 734-749

stochastic neural computation. Brown, B.D., + , T-C Sep 01 891-905

stochastic neural computation, soft competitive learning. Brown, B.D., + , T-C Sep 01 906-920

very-high radix division, prescaling/selection by rounding. Montuschi, P., + , T-C Jan 01 13-27

Digital arithmetic;
see Carry logic; Floating point arithmetic; Redundant number systems
Digital circuits;
see Adders; Digital filters
Digital filters

digital FIR filters, testing schemes. Mukherjee, N., + , T-C Jul 01 674-688

Digital integrated circuits;
see Microprocessor chips; Storage management chips
Digital simulation

wormhole-routed k-ary n-cubes in presence of hot-spot traffic, anal. modeling. Sarbazi-Azad, H., + , T-C Jul 01 623-634

Digital simulation;
see Discrete event simulation; Virtual machines
Digital storage

designing memory hierarchy with hardware prefetching. Lin, W.-F., + , T-C Nov 01 1202-1218

hardware and software techniques for controlling DRAM power modes. Delaluz, V., + , T-C Nov 01 1154-1173

high performance memory systems. Wilkes, M.V. , T-C Nov 01 1105-1106

high performance memory systems (special section). T-C Nov 01 1103-1166

high performance memory systems (special section intro.). Hadlmloglu, H., + , T-C Nov 01 1103-1104

improving performance of large physically indexed caches by decoupling memory addresses from cache addresses. Min, R., + , T-C Nov 01 1191-1201

silent stores and store value locality. Lepak, K.M., + , T-C Nov 01 1174-1190

Digital storage;
see Buffer storage; Random-access storage
Digital systems;
see Computer networks; Real-time systems
Directed graphs

complexity of OBDD composition and efficiency of partitioned-OBDDs over OBDDs. Jaln, J., + , T-C Nov 01 1289-1290

optimal fault-tolerant routing algm. for double-loop networks. Yu-Liang Liu, + , T-C May 01 500-505

proc. grid diagnosis, correct and almost complete. Chessa, S., + , T-C Oct 01 1095-1102

Directed graphs;
see Petri nets
Discrete cosine transforms

DCT implement. with distributed arith. Sungwook Yu, + , T-C Sep 01 985-991

Discrete event simulation

lossless trace compression. Johnson, E.E., + , T-C Feb 01 158-173

VHDL descriptions, asynchronous distributed event driven simul. algm. Ghosh, S., T-C Jan 01 28-50

Distributed algorithms;
see Parallel algorithms
Distributed arithmetic

DCT implement. with distributed arith. Sungwook Yu, + , T-C Sep 01 985-991

Distributed databases

automatic code mapping on intelligent memory architecture. Solihin, Y., + , T-C Nov 01 1248-1266

Distributed processing

timing constraint remapping to achieve time equi-continuity in distributed real-time systems. Ryu, M., + , T-C Dec 01 1310-1320

Distributed processing;
see Computer networks; Distributed databases; Message passing; Network operating systems; Parallel processing; Pipeline processing; Processor scheduling
Distributed programming;
see Parallel programming
DP management;
see Capacity management (computers)
DRAM chips

designing memory hierarchy with hardware prefetching. Lin, W.-F., + , T-C Nov 01 1202-1218

hardware and software techniques for controlling DRAM power modes. Delaluz, V., + , T-C Nov 01 1154-1173

high-performance DRAMs in workstation environments. Cuppu, V., + , T-C Nov 01 1133-1153

high performance memory systems. Wilkes, M.V. , T-C Nov 01 1105-1106

Dynamic response;
see Transient response
E
Electronic engineering;
see Low-power electronics
Electronic engineering computing;
see Logic simulation
Embedded systems

automatic accurate cost-bound analysis for high-level languages. Liu, Y.A., + , T-C Dec 01 1295-1309

Energy conservation

lower-power high-perform. superscalar archits. Zyuban, V.V., + , T-C Mar 01 268-285

Energy resources;
see Energy conservation
Engineering computing;
see Virtual machines
Error correction codes

algm.-based fault tolerance design using weighted data-check rels. Hee Yong Youn, + , T-C Apr 01 371-383

fast algm. for multiplicative inversion in GF(2 m) using normal basis. Takagi, N., + , T-C May 01 394-398

Error detection

semiconcurrent error detect. in data paths. Antola, A., + , T-C May 01 449-465

Errors;
see Roundoff errors
Evolutionary computation;
see Cellular automata
F
Fault diagnosis

hierarchical diagnosis of identical units in syst. Koppolu, S., + , T-C Feb 01 186-191

proc. grid diagnosis, correct and almost complete. Chessa, S., + , T-C Oct 01 1095-1102

Fault tolerance;
see Fault tolerant computing
Fault tolerant computing

algm.-based fault tolerance design using weighted data-check rels. Hee Yong Youn, + , T-C Apr 01 371-383

optimal checkpoint placement using variational calculus approach. Yibei Ling, + , T-C Jul 01 699-708

optimal fault-tolerant routing algm. for double-loop networks. Yu-Liang Liu, + , T-C May 01 500-505

proc. grid diagnosis, correct and almost complete. Chessa, S., + , T-C Oct 01 1095-1102

semiconcurrent error detect. in data paths. Antola, A., + , T-C May 01 449-465

Fault tolerant computing;
see Software fault tolerance
Fibers;
see Optical fibers
Field programmable gate arrays

high-radix Montgomery modular exponentiation on reconfigurable hardware. Blum, T., + , T-C Jul 01 759-764

File organization

Rio file cache, design and verification. Ng, W.T., + , T-C Apr 01 322-337

File organization;
see Data structures; Storage management
Filters;
see Digital filters; FIR filters
Finite automata;
see Cellular automata
FIR filters

digital FIR filters, testing schemes. Mukherjee, N., + , T-C Jul 01 674-688

Flip-flops

bit-parallel systolic multipliers for GF(2 m) fields defined by all-one and equally spaced polynomials. Chiou-Yng Lee, + , T-C May 01 385-393

Floating point arithmetic

operation-saving VLSI archits. for 3D geom. transforms. Karagianni, K., + , T-C Jun 01 609-622

VLIW archits., num. programs, perform. increase. Lopez, D., + , T-C Oct 01 1033-1051

Flow graphs;
see Data flow graphs
Formal logic;
see Boolean functions; Process algebra
Formal specification

weakly hard real-time systs. Bernat, G., + , T-C Apr 01 308-321

Formal verification

symbolic anal. of bounded Petri nets. Pastor, E., + , T-C May 01 432-448

Functions;
see Boolean functions; Walsh functions
G
Galois fields

fast algm. for multiplicative inversion in GF(2 m) using normal basis. Takagi, N., + , T-C May 01 394-398

Mastrovito multipliers for general irreducible polynomials, systematic design. Tong Zhang, + , T-C Jul 01 734-749

type II multiplier. Sunar, B., + , T-C Jan 01 83-87

Geometry;
see Computational geometry
Graph theory

codes identifying vertices in 2D sq. lattice with diagonals. Cohen, G.D., + , T-C Feb 01 174-176

complexity of OBDD composition and efficiency of partitioned-OBDDs over OBDDs. Jaln, J., + , T-C Nov 01 1289-1290

longest fault-free paths in star graphs with edge faults. Sun-Yuan Hsieh, + , T-C Sep 01 960-971

Graph theory;
see Directed graphs; Trees (mathematics)
H
Hamming codes

algm.-based fault tolerance design using weighted data-check rels. Hee Yong Youn, + , T-C Apr 01 371-383

Hardware description languages

VHDL descriptions, asynchronous distributed event driven simul. algm. Ghosh, S., T-C Jan 01 28-50

High level languages

automatic accurate cost-bound analysis for high-level languages. Liu, Y.A., + , T-C Dec 01 1295-1309

High level synthesis

optimal allocation of carry-save-adders in arith. ccts. Junhyung Um, + , T-C Mar 01 215-233

semiconcurrent error detect. in data paths. Antola, A., + , T-C May 01 449-465

I
Image coding

DCT implement. with distributed arith. Sungwook Yu, + , T-C Sep 01 985-991

Information retrieval systems;
see Search engines
Information systems;
see Database management systems
Information theory;
see Prediction theory
Instruction sets

dyn. binary translation and optim. Ebcioglu, K., + , T-C Jun 01 529-548

multithreading, improved latency tolerance through decoupling. Parcerisa, J.-M., + , T-C Oct 01 1084-1094

VLIW archits., num. programs, perform. increase. Lopez, D., + , T-C Oct 01 1033-1051

Integrated memory circuits;
see DRAM chips
Interactive video;
see Video on demand
Interconnections;
see Optical interconnections
Interpolation

rational interpolation examples in perform. anal. Liu, C., + , T-C Sep 01 997-1003

Iterative methods

layout-conscious iteration space transformation technique. Kandemir, M., + , T-C Dec 01 1321-1336

Iterative methods;
see Newton method
J
Java

Java runtime systs., charactn. and architectural implications. Radhakrishnan, R., + , T-C Feb 01 131-146

L
Land mobile radio;
see Cellular radio
Large scale integration;
see VLSI
Linear algebra

heterog. cluster scaLAPACK, dense lin. solvers. Beaumont, O., + , T-C Oct 01 1052-1070

Linear codes;
see Hamming codes
Linear programming

timed-token MAC protocol, sync. bandwidth allocation for real-time commun. Ching-Chih Han, + , T-C May 01 414-431

Logic;
see Carry logic; Logic design; Logic simulation; Logic testing
Logic CAD;
see High level synthesis
Logic circuits;
see Combinational circuits
Logic design

complexity of OBDD composition and efficiency of partitioned-OBDDs over OBDDs. Jaln, J., + , T-C Nov 01 1289-1290

control cct. for asynchronous micropipelines. Chiu-Sing Choy, + , T-C Sep 01 992-997

high performance memory systems (special section). T-C Nov 01 1103-1166

high performance memory systems (special section intro.). Hadlmloglu, H., + , T-C Nov 01 1103-1104

pruned Walsh transform, decision diag. method. Jankovic, D., + , T-C Feb 01 147-157

worst and best irredundant sum-of-products expressions. Sasao, T., + , T-C Sep 01 935-948

Logic simulation

cache-memory interfaces in compressed memory systems. Benvemste, C.D., + , T-C Nov 01 1106-1116

high-performance DRAMs in workstation environments. Cuppu, V., + , T-C Nov 01 1133-1153

Logic testing

digital FIR filters, testing schemes. Mukherjee, N., + , T-C Jul 01 674-688

hierarchical diagnosis of identical units in syst. Koppolu, S., + , T-C Feb 01 186-191

recursive pseudoexhaustive test pattern generator, cellular automata-based. Dasgupta, P., + , T-C Feb 01 177-185

Low-power electronics

hardware and software techniques for controlling DRAM power modes. Delaluz, V., + , T-C Nov 01 1154-1173

M
Machine oriented languages;
see Instruction sets
Management;
see Cost-benefit analysis
Markov processes

bound computation of dependability and perform. measures. Mahevas, S., + , T-C May 01 399-413

Markov regenerative stochastic Petri nets to model and evaluate phased mission systems dependability. Mura, I., + , T-C Dec 01 1337-1351

Mathematical analysis;
see Approximation theory
Mathematical programming;
see Linear programming
Mathematics;
see Probability
Matrix algebra;
see Matrix multiplication; Toeplitz matrices
Matrix multiplication

operation-saving VLSI archits. for 3D geom. transforms. Karagianni, K., + , T-C Jun 01 609-622

OTIS-Mesh optoelectronic computer for matrix multiplication. Chih-Fang Wang, + , T-C Jul 01 635-646

parallel matrix multiplication on lin. array with, reconfigurable pipelined bus syst. Keqin Li, + , T-C May 01 519-525

Memory architechture

improving performance of large physically indexed caches by decoupling memory addresses from cache addresses. Min, R., + , T-C Nov 01 1191-1201

Memory architecture

automatic code mapping on intelligent memory architecture. Solihin, Y., + , T-C Nov 01 1248-1266

cache-memory interfaces in compressed memory systems. Benvemste, C.D., + , T-C Nov 01 1106-1116

compiler support for scalable and efficient memory systems. Barua, R., + , T-C Nov 01 1234-1247

designing memory hierarchy with hardware prefetching. Lin, W.-F., + , T-C Nov 01 1202-1218

hardware and software techniques for controlling DRAM power modes. Delaluz, V., + , T-C Nov 01 1154-1173

hardware compressed main memory; operating system support and performance evaluation. Aball, B., + , T-C Nov 01 1219

high bandwidth on-chip cache design. Wilson, K.M., + , T-C Apr 01 292-307

impulse memory controller. Zhang, L., + , T-C Nov 01 1117-1132

layout-conscious iteration space transformation technique. Kandemir, M., + , T-C Dec 01 1321-1336

silent stores and store value locality. Lepak, K.M., + , T-C Nov 01 1174-1190

Memory management

cache-memory interfaces in compressed memory systems. Benvemste, C.D., + , T-C Nov 01 1106-1116

Memory protocols

ADir pNB, full map directory-based cache coherence protocols. Tao Li, + , T-C Sep 01 921-934

silent stores and store value locality. Lepak, K.M., + , T-C Nov 01 1174-1190

Message passing

four-ary tree-based barrier sync. for 2D meshes without nonmember involvement. Sangman Moh, + , T-C Aug 01 811-823

heterog. cluster scaLAPACK, dense lin. solvers. Beaumont, O., + , T-C Oct 01 1052-1070

hierarchical ring network, config./perform. modeling. Hamacher, V.C., + , T-C Jan 01 1-12

pipelined all-to-all broadcast in all-port meshes and tori. Yuanyuan Yang, + , T-C Oct 01 1020-1032

Message switching

pipelined all-to-all broadcast in all-port meshes and tori. Yuanyuan Yang, + , T-C Oct 01 1020-1032

Microcomputers;
see Network computers
Microprocessor chips

lower-power high-perform. superscalar archits. Zyuban, V.V., + , T-C Mar 01 268-285

Minimization of switching nets

worst and best irredundant sum-of-products expressions. Sasao, T., + , T-C Sep 01 935-948

Monte Carlo methods

estimating large entries of convolution. Atallah, M.J., T-C Mar 01 193-196

Multi-access systems;
see Time division multiple access
Multicast communication

k-ary n-cubes, adaptive hardware tree-based multicast routing. Kumar, D.R., + , T-C Jul 01 647-659

two-stage satellite-terrestrial wireless systs., push-based inform. delivery. Ercetin, O., + , T-C May 01 506-518

Multiplexing

connection admission control, performability. Meyer, J.F., T-C Jul 01 724-733

Multiplexing;
see Time division multiplexing; Wavelength division multiplexing
Multiplying circuits

bit-parallel systolic multipliers for GF(2 m) fields defined by all-one and equally spaced polynomials. Chiou-Yng Lee, + , T-C May 01 385-393

Mastrovito multipliers for general irreducible polynomials, systematic design. Tong Zhang, + , T-C Jul 01 734-749

Multiprocessing systems

VLIW archits., num. programs, perform. increase. Lopez, D., + , T-C Oct 01 1033-1051

Multiprocessing systems;
see Shared memory systems
Multiprocessor interconnection networks

codes identifying vertices in 2D sq. lattice with diagonals. Cohen, G.D., + , T-C Feb 01 174-176

deadlock-free oblivious wormhole routing with cyclic dependencies. Schwiebert, L., T-C Sep 01 865-876

four-ary tree-based barrier sync. for 2D meshes without nonmember involvement. Sangman Moh, + , T-C Aug 01 811-823

hierarchical ring network, config./perform. modeling. Hamacher, V.C., + , T-C Jan 01 1-12

k-ary n-cubes, adaptive hardware tree-based multicast routing. Kumar, D.R., + , T-C Jul 01 647-659

longest fault-free paths in star graphs with edge faults. Sun-Yuan Hsieh, + , T-C Sep 01 960-971

pipelined all-to-all broadcast in all-port meshes and tori. Yuanyuan Yang, + , T-C Oct 01 1020-1032

proc. grid diagnosis, correct and almost complete. Chessa, S., + , T-C Oct 01 1095-1102

star network, optimally bal. spanning tree. Rescigno, A.A., T-C Jan 01 88-91

wormhole-routed k-ary n-cubes in presence of hot-spot traffic, anal. modeling. Sarbazi-Azad, H., + , T-C Jul 01 623-634

Multistage interconnection networks

hierarchical crossbar interconnection networks, perform. modeling. Gang Han, + , T-C Sep 01 877-890

Multi-threading

Atlas chip-multiprocessor archit. Codrescu, L., + , T-C Jan 01 67-82

fine-grained multithreading with proc. calculi. Lopes, L., + , T-C Aug 01 852-862

multithreading, improved latency tolerance through decoupling. Parcerisa, J.-M., + , T-C Oct 01 1084-1094

scheduled dataflow, execution paradigm, archit., and perform. eval. Kavi, K.M., + , T-C Aug 01 834-846

Multivariable systems

multivariate rational approximants for multiclass closed queuing networks. Cuyt, A., + , T-C Nov 01 1279-1288

Multivibrators;
see Flip-flops
N
Network computers

high-performance DRAMs in workstation environments. Cuppu, V., + , T-C Nov 01 1133-1153

Network operating systems

abort-oriented concurrency control for real-time databases. Tei-Wei Kuo, + , T-C Jul 01 660-673

Network routing

deadlock-free oblivious wormhole routing with cyclic dependencies. Schwiebert, L., T-C Sep 01 865-876

k-ary n-cubes, adaptive hardware tree-based multicast routing. Kumar, D.R., + , T-C Jul 01 647-659

optimal fault-tolerant routing algm. for double-loop networks. Yu-Liang Liu, + , T-C May 01 500-505

wormhole-routed k-ary n-cubes in presence of hot-spot traffic, anal. modeling. Sarbazi-Azad, H., + , T-C Jul 01 623-634

Networks (circuits);
see Multiplying circuits; Switching networks; Telecommunication networks
Network servers

hardware compressed main memory; operating system support and performance evaluation. Aball, B., + , T-C Nov 01 1219

Neural nets

stochastic neural computation. Brown, B.D., + , T-C Sep 01 891-905

stochastic neural computation, soft competitive learning. Brown, B.D., + , T-C Sep 01 906-920

Newton method

multivariate rational approximants for multiclass closed queuing networks. Cuyt, A., + , T-C Nov 01 1279-1288

optimal algms. for well-conditioned nonlin. systs. of eqns. Bianchini, N., + , T-C Jul 01 689-698

Numerical analysis;
see Approximation theory; Iterative methods; Monte Carlo methods
O
Object-oriented languages;
see Java
Operating system kernels

heterog. cluster scaLAPACK, dense lin. solvers. Beaumont, O., + , T-C Oct 01 1052-1070

Operating systems (computers);
see Network operating systems
Operations research;
see Scheduling
Optical communication

converter placement supporting broadcast in WDM opt. networks. Lu Ruan, + , T-C Jul 01 750-758

Optical computing

OTIS-Mesh optoelectronic computer for matrix multiplication. Chih-Fang Wang, + , T-C Jul 01 635-646

Optical elements;
see Optical fibers
Optical fibers

Fibonacci opt. ATM switch, design and eval. Shum, A., + , T-C May 01 466-481

Optical information processing;
see Optical computing
Optical interconnections

OTIS-Mesh optoelectronic computer for matrix multiplication. Chih-Fang Wang, + , T-C Jul 01 635-646

temporal QoS in WDMA-based star-coupled opt. networks. Hung-Ying Tyan, + , T-C Mar 01 197-214

Optical switches

Fibonacci opt. ATM switch, design and eval. Shum, A., + , T-C May 01 466-481

Optical waveguides;
see Optical fibers
Optimization

heterog. cluster scaLAPACK, dense lin. solvers. Beaumont, O., + , T-C Oct 01 1052-1070

Optimizing compilers

data rel. vectors, abstraction for data optim. Kandemir, M., + , T-C Aug 01 798-810

relax. memory consistency hiding with compiler. Lee, J., + , T-C Aug 01 824-833

runtime optim., architectural framework. Merten, M.C., + , T-C Jun 01 567-589

P
Parallel algorithms

boundary scan-based relay wave propag. test of arrays of identical struct. Sasidhar, K., + , T-C Oct 01 1007-1019

optimal algms. for well-conditioned nonlin. systs. of eqns. Bianchini, N., + , T-C Jul 01 689-698

parallel matrix multiplication on lin. array with, reconfigurable pipelined bus syst. Keqin Li, + , T-C May 01 519-525

pipelined all-to-all broadcast in all-port meshes and tori. Yuanyuan Yang, + , T-C Oct 01 1020-1032

VHDL descriptions, asynchronous distributed event driven simul. algm. Ghosh, S., T-C Jan 01 28-50

Parallel architectures

Atlas chip-multiprocessor archit. Codrescu, L., + , T-C Jan 01 67-82

dyn. binary translation and optim. Ebcioglu, K., + , T-C Jun 01 529-548

fine-grained multithreading with proc. calculi. Lopes, L., + , T-C Aug 01 852-862

k-ary n-cubes, adaptive hardware tree-based multicast routing. Kumar, D.R., + , T-C Jul 01 647-659

multithreading, improved latency tolerance through decoupling. Parcerisa, J.-M., + , T-C Oct 01 1084-1094

operation-saving VLSI archits. for 3D geom. transforms. Karagianni, K., + , T-C Jun 01 609-622

Parallel Architecture and Compilation Techniques Conference (special issue). T-C Aug 01 767-862

Parallel Architecture and Compilation Techniques Conference (special issue intro.). Hurson, A.R., + , T-C Aug 01 767-768

runtime optim., architectural framework. Merten, M.C., + , T-C Jun 01 567-589

scheduled dataflow, execution paradigm, archit., and perform. eval. Kavi, K.M., + , T-C Aug 01 834-846

VLIW archits., num. programs, perform. increase. Lopez, D., + , T-C Oct 01 1033-1051

wide-issue ILP proc., table bandwidth and update delay for value prediction. Sang-Jeong Lee, + , T-C Aug 01 847-852

Parallel architectures;
see Systolic arrays
Parallel processing

algm.-based fault tolerance design using weighted data-check rels. Hee Yong Youn, + , T-C Apr 01 371-383

wide issue proc., high-bandwidth memory pipeline. Sangyeun Cho, + , T-C Jul 01 709-723

Parallel processing;
see Data flow computing; Parallel algorithms; Parallel architectures; Parallel programming
Parallel programming

lifetime-sensitive modulo scheduling in prod. environ. Llosa, J., + , T-C Mar 01 234-249

Parallel Architecture and Compilation Techniques Conference (special issue). T-C Aug 01 767-862

Parallel Architecture and Compilation Techniques Conference (special issue intro.). Hurson, A.R., + , T-C Aug 01 767-768

VLIW archits., num. programs, perform. increase. Lopez, D., + , T-C Oct 01 1033-1051

Parallel programming;
see Multi-threading
Pattern matching

estimating large entries of convolution. Atallah, M.J., T-C Mar 01 193-196

Pattern recognition;
see Pattern matching
Performance evaluation

automatic code mapping on intelligent memory architecture. Solihin, Y., + , T-C Nov 01 1248-1266

bound computation of dependability and perform. measures. Mahevas, S., + , T-C May 01 399-413

cache-memory interfaces in compressed memory systems. Benvemste, C.D., + , T-C Nov 01 1106-1116

connection admission control, performability. Meyer, J.F., T-C Jul 01 724-733

decoupled front-end archit., optim. enabled. Reinman, G., + , T-C Apr 01 338-355

hardware compressed main memory; operating system support and performance evaluation. Aball, B., + , T-C Nov 01 1219

hierarchical crossbar interconnection networks, perform. modeling. Gang Han, + , T-C Sep 01 877-890

hierarchical ring network, config./perform. modeling. Hamacher, V.C., + , T-C Jan 01 1-12

high-performance DRAMs in workstation environments. Cuppu, V., + , T-C Nov 01 1133-1153

improving performance of large physically indexed caches by decoupling memory addresses from cache addresses. Min, R., + , T-C Nov 01 1191-1201

Markov regenerative stochastic Petri nets to model and evaluate phased mission systems dependability. Mura, I., + , T-C Dec 01 1337-1351

operation-saving VLSI archits. for 3D geom. transforms. Karagianni, K., + , T-C Jun 01 609-622

Parallel Architecture and Compilation Techniques Conference (special issue). T-C Aug 01 767-862

Parallel Architecture and Compilation Techniques Conference (special issue intro.). Hurson, A.R., + , T-C Aug 01 767-768

rational interpolation examples in perform. anal. Liu, C., + , T-C Sep 01 997-1003

scheduled dataflow, execution paradigm, archit., and perform. eval. Kavi, K.M., + , T-C Aug 01 834-846

wide-issue ILP proc., table bandwidth and update delay for value prediction. Sang-Jeong Lee, + , T-C Aug 01 847-852

wormhole-routed k-ary n-cubes in presence of hot-spot traffic, anal. modeling. Sarbazi-Azad, H., + , T-C Jul 01 623-634

Performance evaluation;
see Software performance evaluation
Petri nets

Markov regenerative stochastic Petri nets to model and evaluate phased mission systems dependability. Mura, I., + , T-C Dec 01 1337-1351

symbolic anal. of bounded Petri nets. Pastor, E., + , T-C May 01 432-448

Pipeline processing

all-port meshes and tori, pipelined all-to-all broadcast. Yuanyuan Yang, + , T-C Oct 01 1020-1032

boundary scan-based relay wave propag. test of arrays of identical struct. Sasidhar, K., + , T-C Oct 01 1007-1019

lifetime-sensitive modulo scheduling in prod. environ. Llosa, J., + , T-C Mar 01 234-249

looping DFGs, automata-based symbolic scheduling. Haynal, S., + , T-C Mar 01 250-267

register queues eval. in software pipelined loops. Tyson, G.S., + , T-C Aug 01 769-783

VLIW archits., num. programs, perform. increase. Lopez, D., + , T-C Oct 01 1033-1051

wide issue proc., high-bandwidth memory pipeline. Sangyeun Cho, + , T-C Jul 01 709-723

Polynomials

bit-parallel systolic multipliers for GF(2 m) fields defined by all-one and equally spaced polynomials. Chiou-Yng Lee, + , T-C May 01 385-393

Mastrovito multipliers for general irreducible polynomials, systematic design. Tong Zhang, + , T-C Jul 01 734-749

Power consumption

Koblitz curve cryptosystem countermeasures, power anal. attacks. Hasan, M.A., T-C Oct 01 1071-1083

Power supplies to apparatus

Koblitz curve cryptosystem countermeasures, power anal. attacks. Hasan, M.A., T-C Oct 01 1071-1083

Prediction theory

control-flow speculation through value prediction. Gonzalez, J., + , T-C Dec 01 1362-1376

Probability

multivariate rational approximants for multiclass closed queuing networks. Cuyt, A., + , T-C Nov 01 1279-1288

Process algebra

fine-grained multithreading with proc. calculi. Lopes, L., + , T-C Aug 01 852-862

Processor scheduling

lifetime-sensitive modulo scheduling in prod. environ. Llosa, J., + , T-C Mar 01 234-249

looping DFGs, automata-based symbolic scheduling. Haynal, S., + , T-C Mar 01 250-267

multithreading, improved latency tolerance through decoupling. Parcerisa, J.-M., + , T-C Oct 01 1084-1094

real-time syst., scheduling, distributed pinwheel model. Chih-Wen Hsueh, + , T-C Jan 01 51-66

scheduled dataflow, execution paradigm, archit., and perform. eval. Kavi, K.M., + , T-C Aug 01 834-846

superblocks scheduling with bound-based branch trade-offs. Meleis, W.M., + , T-C Aug 01 784-797

Program compilers

continuous program optim., design and eval. Kistler, T., + , T-C Jun 01 549-566

dyn. binary translation and optim. Ebcioglu, K., + , T-C Jun 01 529-548

Java runtime systs., charactn. and architectural implications. Radhakrishnan, R., + , T-C Feb 01 131-146

lifetime-sensitive modulo scheduling in prod. environ. Llosa, J., + , T-C Mar 01 234-249

Parallel Architecture and Compilation Techniques Conference (special issue). T-C Aug 01 767-862

Parallel Architecture and Compilation Techniques Conference (special issue intro.). Hurson, A.R., + , T-C Aug 01 767-768

register queues eval. in software pipelined loops. Tyson, G.S., + , T-C Aug 01 769-783

superblocks scheduling with bound-based branch trade-offs. Meleis, W.M., + , T-C Aug 01 784-797

Program compilers;
see Compiler generators; Optimizing compilers
Program control structures

VLIW archits., num. programs, perform. increase. Lopez, D., + , T-C Oct 01 1033-1051

Program interpreters

constant-time addition and simultaneous format conversion based on redundant binary representations. Phatak, D.S., + , T-C Nov 01 1267-1278

Programmable logic arrays;
see Field programmable gate arrays
Programming environments

Parallel Architecture and Compilation Techniques Conference (special issue). T-C Aug 01 767-862

Parallel Architecture and Compilation Techniques Conference (special issue intro.). Hurson, A.R., + , T-C Aug 01 767-768

Programming languages;
see High level languages
Program processors;
see Program compilers; Program interpreters
Project engineering;
see Scheduling
Protocols

control cct. for asynchronous micropipelines. Chiu-Sing Choy, + , T-C Sep 01 992-997

Protocols;
see Access protocols; Memory protocols
Q
Quality of service

connection admission control, performability. Meyer, J.F., T-C Jul 01 724-733

temporal QoS in WDMA-based star-coupled opt. networks. Hung-Ying Tyan, + , T-C Mar 01 197-214

Queueing theory

max. factor queue length batching scheme for VoD systs. Aggarwal, C.C., + , T-C Feb 01 97-110

Queuing theory

bound computation of dependability and perform. measures. Mahevas, S., + , T-C May 01 399-413

hierarchical ring network, config./perform. modeling. Hamacher, V.C., + , T-C Jan 01 1-12

multivariate rational approximants for multiclass closed queuing networks. Cuyt, A., + , T-C Nov 01 1279-1288

R
Radio access networks

two-stage satellite-terrestrial wireless systs., push-based inform. delivery. Ercetin, O., + , T-C May 01 506-518

Radio networks;
see Radio access networks
Radiotelephony;
see Cellular radio
RAID

longest fault-free paths in star graphs with edge faults. Yeung, K.H., + , T-C Sep 01 949-959

Random-access storage

high performance memory systems (special section). T-C Nov 01 1103-1166

high performance memory systems (special section intro.). Hadlmloglu, H., + , T-C Nov 01 1103-1104

Random-access storage;
see DRAM chips
Randomized algorithms

rational interpolation examples in perform. anal. Liu, C., + , T-C Sep 01 997-1003

Random processes

Koblitz curve cryptosystem countermeasures, power anal. attacks. Hasan, M.A., T-C Oct 01 1071-1083

Random processes;
see Queuing theory
Real-time systems

abort-oriented concurrency control for real-time databases. Tei-Wei Kuo, + , T-C Jul 01 660-673

rational interpolation examples in perform. anal. Liu, C., + , T-C Sep 01 997-1003

scheduling, distributed pinwheel model. Chih-Wen Hsueh, + , T-C Jan 01 51-66

timed-token MAC protocol, sync. bandwidth allocation for real-time commun. Ching-Chih Han, + , T-C May 01 414-431

timing constraint remapping to achieve time equi-continuity in distributed real-time systems. Ryu, M., + , T-C Dec 01 1310-1320

weakly hard real-time systs. Bernat, G., + , T-C Apr 01 308-321

Real-time systems;
see Embedded systems
Reconfigurable architectures

high-radix Montgomery modular exponentiation on reconfigurable hardware. Blum, T., + , T-C Jul 01 759-764

Redundant number systems

constant-time addition and simultaneous format conversion based on redundant binary representations. Phatak, D.S., + , T-C Nov 01 1267-1278

Reliability;
see Fault tolerant computing
Resource allocation

heterog. cluster scaLAPACK, dense lin. solvers. Beaumont, O., + , T-C Oct 01 1052-1070

optimal reward-based scheduling for periodic real-time tasks. Aydin, H., + , T-C Feb 01 111-130

Roundoff errors

algm.-based fault tolerance design using weighted data-check rels. Hee Yong Youn, + , T-C Apr 01 371-383

S
Satellite communication

two-stage satellite-terrestrial wireless systs., push-based inform. delivery. Ercetin, O., + , T-C May 01 506-518

Scheduling

lookahead scheduling requests for multisize page caching. Kiniwa, J., + , T-C Sep 01 972-983

max. factor queue length batching scheme for VoD systs. Aggarwal, C.C., + , T-C Feb 01 97-110

optimal reward-based scheduling for periodic real-time tasks. Aydin, H., + , T-C Feb 01 111-130

scheduling policies for class of IRIS real-time tasks. Kyunghee Choi, + , T-C May 01 526-528

timing constraint remapping to achieve time equi-continuity in distributed real-time systems. Ryu, M., + , T-C Dec 01 1310-1320

weakly hard real-time systs. Bernat, G., + , T-C Apr 01 308-321

Scheduling;
see Processor scheduling
Search engines

hardware compressed main memory; operating system support and performance evaluation. Aball, B., + , T-C Nov 01 1219

Security of data;
see Cryptography
Sensitivity analysis

Markov regenerative stochastic Petri nets to model and evaluate phased mission systems dependability. Mura, I., + , T-C Dec 01 1337-1351

Shared memory systems

ADir pNB, full map directory-based cache coherence protocols. Tao Li, + , T-C Sep 01 921-934

Atlas chip-multiprocessor archit. Codrescu, L., + , T-C Jan 01 67-82

hierarchical ring network, config./perform. modeling. Hamacher, V.C., + , T-C Jan 01 1-12

Signal processing;
see Convolution; Data compression
Simulation

LRFU; spectrum of policies that subsumes least recently used and least frequently used policies. Lee, D., + , T-C Dec 01 1352-1361

Parallel Architecture and Compilation Techniques Conference (special issue). T-C Aug 01 767-862

Parallel Architecture and Compilation Techniques Conference (special issue intro.). Hurson, A.R., + , T-C Aug 01 767-768

Simulation;
see Digital simulation; Logic simulation
Software cost estimation

automatic accurate cost-bound analysis for high-level languages. Liu, Y.A., + , T-C Dec 01 1295-1309

Software engineering;
see Formal specification; Formal verification; Programming environments; Software cost estimation; Software performance evaluation
Software fault tolerance

Rio file cache, design and verification. Ng, W.T., + , T-C Apr 01 322-337

Software performance evaluation

superblocks scheduling with bound-based branch trade-offs. Meleis, W.M., + , T-C Aug 01 784-797

Software reliability;
see Software fault tolerance
Special issues and sections

high performance memory systems (special section). T-C Nov 01 1103-1166

high performance memory systems (special section intro.). Hadlmloglu, H., + , T-C Nov 01 1103-1104

Parallel Architecture and Compilation Techniques Conference (special issue intro.). T-C Aug 01 767-862

Parallel Architecture and Compilation Techniques Conference (special issue intro.). Hurson, A.R., + , T-C Aug 01 767-768

Specification languages;
see Hardware description languages
Statistics;
see Monte Carlo methods
Stochastic processes

Markov regenerative stochastic Petri nets to model and evaluate phased mission systems dependability. Mura, I., + , T-C Dec 01 1337-1351

Stochastic processes;
see Markov processes
Storage management

decoupled front-end archit., optim. enabled. Reinman, G., + , T-C Apr 01 338-355

hardware compressed main memory; operating system support and performance evaluation. Aball, B., + , T-C Nov 01 1219

LRFU; spectrum of policies that subsumes least recently used and least frequently used policies. Lee, D., + , T-C Dec 01 1352-1361

uniprocessor virtual memory without translation lookaside buffers. Jacob, B., + , T-C May 01 482-499

Storage management;
see Buffer storage; Memory protocols; Virtual storage
Storage management chips

designing memory hierarchy with hardware prefetching. Lin, W.-F., + , T-C Nov 01 1202-1218

high performance memory systems. Wilkes, M.V. , T-C Nov 01 1105-1106

Subscriber loops

large-scale mobility databases in cellular telephone networks, overflow elimination. Yi-Bing Lin, T-C Apr 01 356-370

Subscriber loops;
see Radio access networks
Switches;
see Optical switches
Switching networks

three-stage one-sided rearrangeable polygonal switching network. Yen, M.-H., + , T-C Nov 01 1291-1294

Switching networks;
see Multiprocessor interconnection networks
Symbol manipulation

symbolic anal. of bounded Petri nets. Pastor, E., + , T-C May 01 432-448

Synchronization

four-ary tree-based barrier sync. for 2D meshes without nonmember involvement. Sangman Moh, + , T-C Aug 01 811-823

relax. memory consistency hiding with compiler. Lee, J., + , T-C Aug 01 824-833

timing constraint remapping to achieve time equi-continuity in distributed real-time systems. Ryu, M., + , T-C Dec 01 1310-1320

System buses

compiler support for scalable and efficient memory systems. Barua, R., + , T-C Nov 01 1234-1247

System recovery

optimal checkpoint placement using variational calculus approach. Yibei Ling, + , T-C Jul 01 699-708

rePLay, hardware framework for dyn. optim. Patel, S.J., + , T-C Jun 01 590-608

Systolic arrays

bit-parallel systolic multipliers for GF(2 m) fields defined by all-one and equally spaced polynomials. Chiou-Yng Lee, + , T-C May 01 385-393

high-radix Montgomery modular exponentiation on reconfigurable hardware. Blum, T., + , T-C Jul 01 759-764

T
Telecommunication;
see Bandwidth allocation; Multicast communication; Optical communication; Satellite communication; Telecommunication networks
Telecommunication channels;
see Channel capacity
Telecommunication congestion control

connection admission control, performability. Meyer, J.F., T-C Jul 01 724-733

Telecommunication control;
see Telecommunication congestion control
Telecommunication network routing

pipelined all-to-all broadcast in all-port meshes and tori. Yuanyuan Yang, + , T-C Oct 01 1020-1032

Telecommunication networks

connection admission control, performability. Meyer, J.F., T-C Jul 01 724-733

Telecommunication networks;
see Broadband networks; Computer networks; Switching networks; Telephone networks
Telecommunication services;
see Quality of service
Telecommunication switching;
see Multiplexing; Switching networks
Telephone lines;
see Subscriber loops
Telephone networks

large-scale mobility databases in cellular telephone networks, overflow elimination. Yi-Bing Lin, T-C Apr 01 356-370

Telephone networks;
see Subscriber loops
Telephony;
see Telephone networks
Telesoftware

pipelined all-to-all broadcast in all-port meshes and tori. Yuanyuan Yang, + , T-C Oct 01 1020-1032

Testing;
see Built-in self test; Computer testing; Logic testing
Time division multiple access

temporal QoS in WDMA-based star-coupled opt. networks. Hung-Ying Tyan, + , T-C Mar 01 197-214

Time division multiplexing

temporal QoS in WDMA-based star-coupled opt. networks. Hung-Ying Tyan, + , T-C Mar 01 197-214

Time division multiplexing;
see Asynchronous transfer mode
Time-varying systems

optimal checkpoint placement using variational calculus approach. Yibei Ling, + , T-C Jul 01 699-708

Timing

real-time syst., scheduling, distributed pinwheel model. Chih-Wen Hsueh, + , T-C Jan 01 51-66

timing constraint remapping to achieve time equi-continuity in distributed real-time systems. Ryu, M., + , T-C Dec 01 1310-1320

Toeplitz matrices

Mastrovito multipliers for general irreducible polynomials, systematic design. Tong Zhang, + , T-C Jul 01 734-749

Topology;
see Graph theory
Transaction processing

longest fault-free paths in star graphs with edge faults. Yeung, K.H., + , T-C Sep 01 949-959

Transforms

layout-conscious iteration space transformation technique. Kandemir, M., + , T-C Dec 01 1321-1336

pruned Walsh transform, decision diag. method. Jankovic, D., + , T-C Feb 01 147-157

Transient response

digital FIR filters, testing schemes. Mukherjee, N., + , T-C Jul 01 674-688

Trees (mathematics)

star network, optimally bal. spanning tree. Rescigno, A.A., T-C Jan 01 88-91

Trees (mathematics);
see Decision trees
U
Unsupervised learning

stochastic neural computation, soft competitive learning. Brown, B.D., + , T-C Sep 01 906-920

V
Variational techniques

optimal checkpoint placement using variational calculus approach. Yibei Ling, + , T-C Jul 01 699-708

Video on demand

max. factor queue length batching scheme for VoD systs. Aggarwal, C.C., + , T-C Feb 01 97-110

Virtual machines

Java runtime systs., charactn. and architectural implications. Radhakrishnan, R., + , T-C Feb 01 131-146

VHDL descriptions, asynchronous distributed event driven simul. algm. Ghosh, S., T-C Jan 01 28-50

Virtual storage

uniprocessor virtual memory without translation lookaside buffers. Jacob, B., + , T-C May 01 482-499

VLSI

operation-saving VLSI archits. for 3D geom. transforms. Karagianni, K., + , T-C Jun 01 609-622

W
Walsh functions

pruned Walsh transform, decision diag. method. Jankovic, D., + , T-C Feb 01 147-157

Wavelength division multiplexing

converter placement supporting broadcast in WDM opt. networks. Lu Ruan, + , T-C Jul 01 750-758

Workstation clusters

heterog. cluster scaLAPACK, dense lin. solvers. Beaumont, O., + , T-C Oct 01 1052-1070

Workstations

high-performance DRAMs in workstation environments. Cuppu, V., + , T-C Nov 01 1133-1153

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