This Article 
 Bibliographic References 
 Add to: 
Control-Flow Speculation through Value Prediction
December 2001 (vol. 50 no. 12)
pp. 1362-1376

In this paper, we introduce a new branch predictor that predicts the outcome of branches by predicting the value of their inputs and performing an early computation of their results according to the predicted values. The design of a hybrid predictor comprising the above branch predictor and a correlating branch predictor is presented. We also propose a new selector that chooses the most reliable prediction for each branch. This selector is based on the path followed to reach the branch. Results for immediate updates show significant misprediction rate reductions with respect to a conventional hybrid predictor for different size configurations. In addition, the proposed hybrid predictor with a size of 8 KB achieves the same accuracy as a conventional one of 64 KB. Performance evaluation for a dynamically scheduled superscalar processor, with realistic updates, shows a speed up of 8 percent despite its higher latency (up to four cycles).

[1] D. Burger and T.M. Austin, “The SimpleScalar Tool Set, Version 2.0,” Technical Report #1342, Computer Sciences Dept., Univ. of Wisconsin-Madison, June 1997.
[2] P.-Y. Chang, E. Hao, and Y.N. Patt, Alternative Implementations of Hybrid Branch Predictors Proc. 28th Ann. Int'l Symp. Microarchitecture, pp. 252-257, Dec. 1995.
[3] G. Chrysos and J. Emer, “Memory Dependence Prediction Using Store Sets,” Proc. 25th Int'l Symp. Computer Architecture, pp. 142-153, July 1998.
[4] M. Evers, P.-Y. Chang, and Y.N. Patt, "Using Hybrid Branch Predictors to Improve Branch Prediction Accuracy in the Presence of Context Switches," Proc. 23rd Ann. Int'l Symp. Computer Architecture, ACM Press, New York, 1996, pp. 3-11.
[5] A. Farcy, O. Temam, R. Espasa, and T. Juan, “Dataflow Analysis of Branch Mispredictions and Its Applications to Early Resolution of Branches,” Proc. Int'l Symp. Microarchitecture, 1998.
[6] F. Gabbay and A. Mendelson, “Speculative Execution Based on Value Prediction,” technical report, Technion, 1997.
[7] J. González and A. González, “Memory Address Prediction for Data Speculations,” Proc. EUROPAR '97 Conf., pp. 1084-1091, Aug. 1997.
[8] J. González and A. González, “Speculative Execution via Address Prediction and Data Prefetching,” Proc. Int'l Conf. Supercomputing, pp. 196-203, 1997.
[9] J. González and A. González, “The Potential of Data Value Speculation to Boost ILP,” Proc. Int'l Conf. Supercomputing, 1998.
[10] J. González and A. González, “Control-Flow Speculation through Value Prediction for Superscalar Processors,” Proc. Int'l Conf. Parallel Architecture and Compilation Techniques, 1999.
[11] T.H. Heil, Z. Smith, and J.E. Smith, “Improving Branch Predictors by Correlating on Data Values,” Proc. Int'l Symp. Microarchitecture, 1999.
[12] T. Juan, S. Sanjeevan, and J.J. Navarro, “Dynamic History-Length Fitting: A Third Level of Adaptivity for Branch Prediction,” Proc. Int'l Symp. Computer Architecture, 1998.
[13] J. Kalamatianos and D.R. Kaeli, “Predicting Indirect Branches via Data Compression,” Proc. Int'l Symp. Microarchitecture, pp. 272-284, 1998.
[14] R.E. Kessler, “The Alpha 21264 Microprocessor,” IEEE Micro, vol. 19, no. 2, pp. 24–36, Mar./Apr. 1999.
[15] C.-C. Lee, I.-C.K. Chen, and T.N. Mudge, “The Bi-Mode Branch Predictor,” Proc. 30th Ann. Int'l Symp. Microarchitecture, pp. 4-13, Dec. 1997.
[16] M.H. Lipasti, Value Locality and Speculative Execution, doctoral dissertation, Carnegie Mellon Univ., Dept. Electrical and Computer Eng., May 1997.
[17] S. Mahlke and B. Natarajan, “Compiler Synthesized Dynamic Branch Prediction,” Proc. 29th Ann. IEEE/ACM Int'l Symp. Microarchitecture, pp. 153-164, Dec. 1996.
[18] S. McFarling, “Combining Branch Predictors,” Technical Report #TN-36, Digital Western Research Laboratory, 1993.
[19] P. Michaud, A. Seznec, and R. Uhlig, “Trading Conflict and Capacity Aliasing in Conditional Branch Predictors,” Proc. 24th Ann. Int'l Symp. Computer Architecture, pp. 292-303, June 1997.
[20] A. Moshovos and G. Sohi,"Streamlining Inter-Operation Memory Communication via Data Dependence Prediction," Proc. 30th Int'l Symp. Microarchitecture, ACM Press, 1997, pp. 235-245.
[21] A. Moshovos et al., "Dynamic Speculation and Synchronization of Data Dependences," Proc. 24th Int'l Symp. on Computer Architecture, IEEE CS Press, Los Alamitos, Calif., 1997, pp. 181-193.
[22] R. Nair, “Dynamic Path-Based Branch Correlation,” Proc Int'l Symp. Microarchitecture, pp. 15-23, 1995.
[23] A. Roth, A. Moshovos, and G.S. Sohi, “Improving Virtual Function Call Target Prediction via Dependence-Based Pre-Computation,” Proc. Int'l Conf. Supercomputing, pp. 356-364, 1999.
[24] Y. Sazeides and J. Smith, “The Predictability of Data Values,” Proc. 30th Ann. Int'l Symp. Microarchitecture (MICRO '30), pp. 248-258, Dec. 1997.
[25] Y. Sazeides and J.E. Smith, “Implementations of Context Based Value Predictors,” Technical Report #ECE-TR-97-8, Univ. of Wisconsin-Madison, 1997.
[26] Y. Sazeides and J.E. Smith, “Modeling Program Predictability,” Proc. Int'l Symp. Computer Architecture, 1998.
[27] R. Sites, Alpha Architecture Reference Manual. Digital Press, 1992.
[28] J.E. Smith, "A Study of Branch Prediction Strategies," Proc. Eighth Ann. Int'l Symp. Computer Architecture, pp. 135-148, June 1981.
[29] E. Sprangle, R.S. Chappell, M. Alsup, and Y.N. Patt, “The Agree Predictor: A Mechanism for Reducing Negative Branch History Interference,” Proc. 24th Annual Int'l Symp. Computer Architecture, pp. 284-291, June 1997.
[30] G. Tyson and T. Austin, “Improving the Accuracy and Performance of Memory Communication through Renaming,” Proc. 30th Ann. Int'l Symp. Microarchitecture (MICRO '30), pp. 218-227, Dec. 1997.
[31] T.-Y. Yeh and Y.N. Patt, ``Two-Level Adaptive Branch Prediction,'' Proc. 24th Ann. ACM/IEEE Int'l Symp. Microarchitecture, pp. 51-61, 1991.
[32] T.-Y. Yeh and Y. Patt, “A Comparison of Dynamic Branch Predictors that Use Two Levels of Branch History,” Proc. 20th Ann. Int'l Symp. Computer Architecture, pp. 257-266, May 1993.

Index Terms:
Branch prediction, value prediction, hybrid predictor, path-based selector, superscalar processors
J. González, A. González, "Control-Flow Speculation through Value Prediction," IEEE Transactions on Computers, vol. 50, no. 12, pp. 1362-1376, Dec. 2001, doi:10.1109/TC.2001.970574
Usage of this product signifies your acceptance of the Terms of Use.