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Issue No.12 - December (2001 vol.50)
pp: 1321-1336
ABSTRACT
<p>Exploiting locality of references has become extremely important in realizing the potential performance of modern machines with deep memory hierarchies. The data access patterns of programs and the memory layouts of the accessed data sets play a critical role in determining the performance of applications running on these machines. This paper presents a cache locality optimization technique that can optimize a loop nest even if the arrays referenced have different layouts in memory. Such a capability is required for a global locality optimization framework that applies both loop and data transformations to a sequence of loop nests for optimizing locality. Our method uses a single linear algebra framework to represent both data layouts and loop transformations. It computes a nonsingular loop transformation matrix such that, in a given loop nest, data locality is exploited in the innermost loops, where it is most useful. The inverse of a nonsingular transformation matrix is built column-by-column, starting from the rightmost column. In addition, our approach can work in those cases where the data layouts of a subset of the referenced arrays is unknown; this is a key step in optimizing a sequence of loop nests and whole programs for locality. Experimental results on an SGI/Cray Origin 2000 nonuniform memory access multiprocessor machine show that our technique reduces execution times by as much as 70 percent.</p>
INDEX TERMS
Data reuse, cache locality, memory layouts, loop transformations, program optimization
CITATION
M. Kandemir, J. Ramanujam, A. Choudhary, P. Banerjee, "A Layout-Conscious Iteration Space Transformation Technique", IEEE Transactions on Computers, vol.50, no. 12, pp. 1321-1336, December 2001, doi:10.1109/TC.2001.970571
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