Publication 2001 Issue No. 5 - May Abstract - An Optimal Fault-Tolerant Routing Algorithm for Double-Loop Networks
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An Optimal Fault-Tolerant Routing Algorithm for Double-Loop Networks
May 2001 (vol. 50 no. 5)
pp. 500-505
 ASCII Text x Yu-Liang Liu, Yue-Li Wang, D.J. Guan, "An Optimal Fault-Tolerant Routing Algorithm for Double-Loop Networks," IEEE Transactions on Computers, vol. 50, no. 5, pp. 500-505, May, 2001.
 BibTex x @article{ 10.1109/12.926162,author = {Yu-Liang Liu and Yue-Li Wang and D.J. Guan},title = {An Optimal Fault-Tolerant Routing Algorithm for Double-Loop Networks},journal ={IEEE Transactions on Computers},volume = {50},number = {5},issn = {0018-9340},year = {2001},pages = {500-505},doi = {http://doi.ieeecomputersociety.org/10.1109/12.926162},publisher = {IEEE Computer Society},address = {Los Alamitos, CA, USA},}
 RefWorks Procite/RefMan/Endnote x TY - JOURJO - IEEE Transactions on ComputersTI - An Optimal Fault-Tolerant Routing Algorithm for Double-Loop NetworksIS - 5SN - 0018-9340SP500EP505EPD - 500-505A1 - Yu-Liang Liu, A1 - Yue-Li Wang, A1 - D.J. Guan, PY - 2001KW - Double-loop networksKW - fault-tolerantKW - optimal message routing.VL - 50JA - IEEE Transactions on ComputersER -

Abstract—A weighted double-loop network can be modeled by a directed graph $G(n;h_1,h_2;w_1,w_2)$ with vertex set $Z_n=\{0,1,\ldots,n-1\}$ and edge set $E=E_1\cup E_2$, where $E_1=\{(u,u+h_1)\;|\; u\in Z_n\}$, $E_2=\{(u,u+h_2)\;|\; u\in Z_n\}$. Assume that the weight of each edge in $E_1$ is $w_1$ and the weight of each edge in $E_2$ is $w_2$. In this paper, we present an optimal routing algorithm on double-loop networks under the case where there is at most one faulty element. Our algorithm is based on the fact that the shortest path from a vertex to any other vertex in a double-loop network is in the L-shape region.

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Index Terms:
Double-loop networks, fault-tolerant, optimal message routing.
Citation:
Yu-Liang Liu, Yue-Li Wang, D.J. Guan, "An Optimal Fault-Tolerant Routing Algorithm for Double-Loop Networks," IEEE Transactions on Computers, vol. 50, no. 5, pp. 500-505, May 2001, doi:10.1109/12.926162