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| M.a. Hasan, A.g. Wassal, "VLSI Algorithms, Architectures, and Implementation of a Versatile GF(2m) Processor," IEEE Transactions on Computers, vol. 49, no. 10, pp. 1064-1073, October, 2000. | |||
| BibTex | x | ||
| @article{ 10.1109/12.888042, author = {M.a. Hasan and A.g. Wassal}, title = {VLSI Algorithms, Architectures, and Implementation of a Versatile GF(2m) Processor}, journal ={IEEE Transactions on Computers}, volume = {49}, number = {10}, issn = {0018-9340}, year = {2000}, pages = {1064-1073}, doi = {http://doi.ieeecomputersociety.org/10.1109/12.888042}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - JOUR JO - IEEE Transactions on Computers TI - VLSI Algorithms, Architectures, and Implementation of a Versatile GF(2m) Processor IS - 10 SN - 0018-9340 SP1064 EP1073 EPD - 1064-1073 A1 - M.a. Hasan, A1 - A.g. Wassal, PY - 2000 KW - Galois (or finite) field processor KW - cryptography KW - canonical (or polynomial) basis KW - triangular basis KW - datapath KW - VLSI implementation. VL - 49 JA - IEEE Transactions on Computers ER - | |||
Abstract—With the explosive growth of electronic commerce, dedicated cryptographic processors are becoming essential since general-purpose processors cannot provide the performance and functionality direly needed. This paper proposes an architecture for a versatile Galois field GF(2
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