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Arithmetic on the European Logarithmic Microprocessor
July 2000 (vol. 49 no. 7)
pp. 702-715

Abstract—A new European research project aims to develop a microprocessor based on the logarithmic number system, in which a real number is represented as a fixed-point logarithm. Multiplication and division therefore proceed in minimal time with no rounding error. However, the system can only offer an overall advantage over floating-point if addition and subtraction can be performed with speed and accuracy at least equal to that of floating-point, but these operations require the interpolation of a nonlinear function which has hitherto been either time-consuming or inaccurate. We present a procedure by which additions and subtractions can be performed rapidly and accurately and show that these operations are thereby competitive with their floating-point equivalents. We then present some large-scale case studies which show that the average performance of the LNS exceeds floating-point, in terms of both speed and accuracy.

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Index Terms:
Digital arithmetic, logarithmic number system, interpolation.
Citation:
J.n. Coleman, E.i. Chester, C.i. Softley, J. Kadlec, "Arithmetic on the European Logarithmic Microprocessor," IEEE Transactions on Computers, vol. 49, no. 7, pp. 702-715, July 2000, doi:10.1109/12.863040
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