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An Efficient and Scalable Approach for Implementing Fault-Tolerant DSM Architectures
May 2000 (vol. 49 no. 5)
pp. 414-430
ASCII Text
x 
 
Christine Morin, Anne-Marie Kermarrec, Michel Banâtre, Alain Gefflaut, "An Efficient and Scalable Approach for Implementing Fault-Tolerant DSM Architectures," IEEE Transactions on Computers, vol. 49, no. 5, pp. 414-430, May, 2000.
 
 
BibTex
x
 
@article{ 10.1109/12.859537,
author = {Christine Morin and Anne-Marie Kermarrec and Michel Banâtre and Alain Gefflaut},
title = {An Efficient and Scalable Approach for Implementing Fault-Tolerant DSM Architectures},
journal ={IEEE Transactions on Computers},
volume = {49},
number = {5},
issn = {0018-9340},
year = {2000},
pages = {414-430},
doi = {http://doi.ieeecomputersociety.org/10.1109/12.859537},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - JOUR
JO - IEEE Transactions on Computers
TI - An Efficient and Scalable Approach for Implementing Fault-Tolerant DSM Architectures
IS - 5
SN - 0018-9340
SP414
EP430
EPD - 414-430
A1 - Christine Morin,
A1 - Anne-Marie Kermarrec,
A1 - Michel Banâtre,
A1 - Alain Gefflaut,
PY - 2000
KW - Distributed shared memory
KW - fault tolerance
KW - coherence protocol
KW - backward error recovery
KW - scalability
KW - performance
KW - coma
KW - svm.
VL - 49
JA - IEEE Transactions on Computers
ER -
 

Abstract—Distributed Shared Memory (dsm) architectures are attractive to execute high performance parallel applications. Made up of a large number of components, these architectures have however a high probability of failure. We propose a protocol to tolerate node failures in cache-based dsm architectures. The proposed solution is based on backward error recovery and consists of an extension to the existing coherence protocol to manage data used by processors for the computation and recovery data used for fault tolerance. This approach can be applied to both Cache Only Memory Architectures (coma) and Shared Virtual Memory (svm) systems. The implementation of the protocol in a coma architecture has been evaluated by simulation. The protocol has also been implemented in an svm system on a network of workstations. Both simulation results and measurements show that our solution is efficient and scalable.

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Index Terms:
Distributed shared memory, fault tolerance, coherence protocol, backward error recovery, scalability, performance, coma, svm.
Citation:
Christine Morin, Anne-Marie Kermarrec, Michel Banâtre, Alain Gefflaut, "An Efficient and Scalable Approach for Implementing Fault-Tolerant DSM Architectures," IEEE Transactions on Computers, vol. 49, no. 5, pp. 414-430, May 2000, doi:10.1109/12.859537
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