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Ahmad A. Hiasat, "New Efficient Structure for a Modular Multiplier for RNS," IEEE Transactions on Computers, vol. 49, no. 2, pp. 170174, February, 2000.  
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@article{ 10.1109/12.833113, author = {Ahmad A. Hiasat}, title = {New Efficient Structure for a Modular Multiplier for RNS}, journal ={IEEE Transactions on Computers}, volume = {49}, number = {2}, issn = {00189340}, year = {2000}, pages = {170174}, doi = {http://doi.ieeecomputersociety.org/10.1109/12.833113}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }  
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TY  JOUR JO  IEEE Transactions on Computers TI  New Efficient Structure for a Modular Multiplier for RNS IS  2 SN  00189340 SP170 EP174 EPD  170174 A1  Ahmad A. Hiasat, PY  2000 KW  Residue number system KW  modular multiplication KW  computer arithmetic KW  VLSI KW  hardware requirements KW  time delay. VL  49 JA  IEEE Transactions on Computers ER   
Abstract—Modular multiplication is a very important arithmetic operation in residuebased realtime computing systems. In realizing these multipliers, ROMbased structures are more efficient for small moduli. Due to the exponential growth of ROM sizes, implementations with arithmetic components are more suitable for medium and large moduli. This paper presents a new modular multiplier that can deal efficiently with medium and large size moduli. The design of this modular multiplier that multiplies two
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