This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
Pseudo-Kronecker Expressions for Symmetric Functions
September 1999 (vol. 48 no. 9)
pp. 987-990

Abstract—Pseudo-Kronecker Expressions (PSDKROs) are a class of AND/EXOR expressions. In this paper, it is proven that exact minimization of PSDKROs for totally symmetric functions can be performed in polynomial time. A new implementation method for PSDKROs is presented. Experimental results are given to show the efficiency of the presented approach in comparison to previously published work on AND/EXOR minimization.

[1] B. Becker and R. Drechsler, “Exact Minimization of Kronecker Expressions for Symmetric Functions,” Proc. Int'l Symp. Circuits and Systems, pp. IV:388-IV:391, 1996.
[2] R.K. Brayton, G.D. Hachtel, C.T. McMullen, and A.L. Sangiovanni-Vincintelli, Logic Minimization Algorithms for VLSI Synthesis.Boston: Kluwer Academic, 1984.
[3] R.E. Bryant, "Graph-Based Algorithms for Boolean Function Manipulation," IEEE Trans. Computers, Vol. C-35, No. 8, Aug. 1986, pp. 667-690.
[4] M. Chatterjee, D.K. Pradhan, and W. Kunz, “LOT: Logic Optimization with Testability—New Transformations Using Recursive Learning,” Proc. Int'l Conf. Computer-Aided Design, pp. 318-325, 1995.
[5] M. Davio, J.P. Deschamps, and A. Thayse, Discrete and Switching Functions. McGraw-Hill, 1978.
[6] R. Drechsler and B. Becker, “Sympathy: Fast Exact Minimization of Fixed Polarity Reed-Muller Expressions for Symmetric Functions,” Proc. European Conf. Design Automation, pp. 91-97, 1995.
[7] T. Kozlowski, E.L. Dagless, and J.M. Saul, “An Enhanced Algorithm for the Minimization of Exclusive-Or Sum-of-Products for Incompletely Specified Functions,” Proc. Int'l Conf. Computer Design, pp. 244-249, 1995.
[8] S.M. Reddy, “Easily Testable Realizations for Logic Functions,” IEEE Trans. Computers, vol. 21, pp. 1,183-1,188, 1972.
[9] I.S. Reed, “A Class of Multiple-Error-Correcting Codes and Their Decoding Scheme,” IRE Trans. Information Theory, vol. 4, pp. 38-42, 1954.
[10] U. Rollwage, “The Complexity of mod-2 Sum PLA's for Symmetric Functions,” Proc. IFIP WG 10.5 Workshop Applications of the Reed-Muller Expansion in Circuit Design, pp. 6-12, Hamburg, 1993.
[11] K.K. Saluja and S.M. Reddy, “Fault Detection Test Sets for Reed-Muller Canonical Networks,” IEEE Trans. Computers, vol. 24, pp. 995-998, 1975.
[12] A. Sarabi and M.A. Perkowski, “Design for Testability Properties of AND/XOR Networks,” Proc. IFIP WG 10. 5 Workshop Applications of the Reed-Muller Expansion in Circuit Design, pp. 147-153, Hamburg, 1993.
[13] T. Sasao, Logic Synthesis and Optimization. Kluwer Academic, 1993.
[14] T. Sasao, "EXMIN2: A Simplification Algorithm for Exclusive-OR Sum-of-Products Expressions for Multiple-Valued-Input Two-Valued-Output Functions," IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, vol. 12, no. 5, pp. 621-632, May 1993.
[15] T. Sasao, Logic Synthesis and Optimization. Kluwer Academic, 1993.
[16] J. Saul, B. Eschermann, and J. Froessl, “Two-Level Logic Circuits Using EXOR Sums of Products,” IEE Proc., vol. 140, pp. 348-356, Nov. 1993.
[17] I. Schäfer and M.A. Perkowski, “Multiple-Valued Input Generalized Reed-Muller Forms,” Proc. Int'l Symp. Multi-Valued Logic, pp. 40-48, 1991.
[18] I. Wegener,The Complexity of Boolean Functions. Wiley-Teubner, 1987.

Index Terms:
Logic synthesis, AND/EXOR, PSDKRO, 2-level minimization, BDD.
Citation:
Rolf Drechsler, "Pseudo-Kronecker Expressions for Symmetric Functions," IEEE Transactions on Computers, vol. 48, no. 9, pp. 987-990, Sept. 1999, doi:10.1109/12.795226
Usage of this product signifies your acceptance of the Terms of Use.