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Kiamal Z. Pekmestzi, "MultiplexerBased Array Multipliers," IEEE Transactions on Computers, vol. 48, no. 1, pp. 1523, January, 1999.  
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@article{ 10.1109/12.743408, author = {Kiamal Z. Pekmestzi}, title = {MultiplexerBased Array Multipliers}, journal ={IEEE Transactions on Computers}, volume = {48}, number = {1}, issn = {00189340}, year = {1999}, pages = {1523}, doi = {http://doi.ieeecomputersociety.org/10.1109/12.743408}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }  
RefWorks Procite/RefMan/Endnote  x  
TY  JOUR JO  IEEE Transactions on Computers TI  MultiplexerBased Array Multipliers IS  1 SN  00189340 SP15 EP23 EPD  1523 A1  Kiamal Z. Pekmestzi, PY  1999 KW  Array multipliers KW  multiplication algorithm KW  two's complement multiplication KW  pipeline multipliers. VL  48 JA  IEEE Transactions on Computers ER   
Abstract—A new algorithm for the multiplication of two nbit numbers based on the synchronous computation of the partial sums of the two operands is presented. The proposed algorithm permits an efficient realization of the parallel multiplication using iterative arrays. At the same time, it permits highspeed operation. Multiplier arrays for positive numbers and numbers in two's complement form based on the proposed technique are implemented. Also, an efficient pipeline form of the proposed multiplication scheme is introduced. All multipliers obtained have low circuit complexity permitting highspeed operation and the interconnections of the cells are regular, wellsuited for VLSI realization.
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