This Article 
 Bibliographic References 
 Add to: 
Fast Approximation Algorithms on Maxcut, k-Coloring, and k-Color Ordering for VLSI Applications
November 1998 (vol. 47 no. 11)
pp. 1253-1266

Abstract—There are a number of VLSI problems that have a common structure. We investigate such a structure that leads to a unified approach for three independent VLSI layout problems: partitioning, placement, and via minimization. Along the line, we first propose a linear-time approximation algorithm on maxcut and two closely related problems: k-coloring and maximal k-color ordering problem. The k-coloring is a generalization of the maxcut and the maximal k-color ordering is a generalization of the k-coloring. For a graph G with e edges and n vertices, our maxcut approximation algorithm runs in O(e + n) sequential time yielding a node-balanced maxcut with size at least (w(E) + w(E)/n)/2, improving the time complexity of O(e log e) known before. Building on the proposed maxcut technique and employing a height-balanced binary decomposition, we devise an O((e + n)log k) time algorithm for the k-coloring problem which always finds a k-partition of vertices such that the number of bad (or "defected") edges does not exceed (w(E)/k)((n$-$ 1)/n)log k, thus improving both the time complexity O(enk) and the bound e/k known before. The other related problem is the maximal k-color ordering problem that has been an open problem [16]. We show the problem is NP-complete, then present an approximation algorithm building on our k-coloring structure. A performance bound on maximal k-color ordering cost, 2kw(E)/3 is attained in O(ek) time. The solution quality of this algorithm is also tested experimentally and found to be effective.

[1] D. Adolphson and T.C. Hu, "Optimal Linear Ordering," SIAM J. Applied Math., vol. 25, pp. 403-423, 1973.
[2] A.V. Aho,J.E. Hopcroft, and J.D. Ullman,The Design and Analysis of Computer Algorithms.Reading, Mass.: Addison-Wesley, 1974.
[3] K.Y. Chao and D.F. Wong, "Layer Assignment for High-Performance Multi-Chip Modules," Proc. Design Automation Conf., pp. 660-685, 1994.
[4] H.H. Chen and C.K. Wong, "Wiring and Crosstalk Avoidance in Multi-Chip Module Design," Proc. IEEE Custom Integrated Circuits Conf., May 1992.
[5] C.K. Cheng, "Linear Placement Algorithms and Application to VLSI Design," Networks, vol. 17, pp. 439-464, 1987.
[6] C.K. Cheng, X. Deng, Y.Z. Liao, and S.Z. Yao, "Symbolic Layout Compaction Under Conditional Design Rules," IEEE Trans. Computer-Aided Design, vol. 11, no. 4, pp. 475-486, Apr. 1992.
[7] W.T. Cheng, J.L. Lewandowski, and E. Wu, "Optimal Diagnostic Methods for Wiring Interconnects," IEEE Trans. Computer-Aided Design, vol. 11, no. 9, pp. 1,161-1,165, Sept. 1992.
[8] J.D. Cho, S. Raje, M. Sarrafzadeh, M. Sriram, and S.M. Kang, "Crosstalk Minimum Layer Assignment," Proc. IEEE Custom Integrated Circuits Conf., pp. 29.7.1-29.7.4,San Diego, Calif., 1993.
[9] P. Erdös, R. Faudee, J. Pach, and J. Spencer, "How to Make a Graph Bipartite," J. Combinatorial Theory (b), vol. 45, pp. 86-98, 1988.
[10] M.R. Garey and D.S. Johnson, Computers and Intractability: A Guide to the Theory of NP-Completeness.New York: W.H. Freeman, 1979.
[11] M.R. Garey, D.S. Johnson, and L. Stockmeyer, "Some Simplified NP-Complete Graph Problems," Theoretical Computer Science, vol. 1, pp. 237-267, 1976.
[12] M.X. Goemans and D.P. Williamson, "Improved Approximation Algorithms for Maximum Cut and Satisfiability Problems Using Semidefinite Programming," Proc. Ann. ACM-SIAM Symp. Theory of Computing, pp. 422-431, 1994.
[13] D.J. Haglin and S.M. Venkatesan, "Approximation and Intractability Results for the Maximum Cut Problem and Its Variants," IEEE Trans. Computers, vol. 40, no. 1, pp. 110-113, Jan. 1991.
[14] A. Hertz and D. de Werra, “Using Tabu Search Techniques for Graph Coloring,” Computing, vol. 39, pp. 345-351, 1987.
[15] J.M. Ho, M. Sarrafzadeh, G. Vijayan, and C.K. Wong, "Layer Assignment for Multi-Chip Modules," IEEE Trans. Computer-Aided Design, vol. 9, no. 12, pp. 1,272-1,277, Dec. 1990.
[16] D.S. Johnson private communication, Bell Labs, Murray Hill, N.J., Oct. 1992.
[17] D.S. Johnson, C.R. Aragon, L.A. McGeoch, and C. Schevon, "Optimization by Simulated Annealing: An Experimental Evaluation, Part II (Graph Coloring and Number Partitioning)," Operations Research, vol. 39, pp. 378-406, 1991.
[18] D.A. Joy and M.J. Ciesielski, "Layer Assignment for Printed Circuit Boards and Integrated Circuits," Proc. IEEE, vol. 80, no. 2, pp. 311-331, Feb. 1992.
[19] Y. Kajitani, J.D. Cho, and M. Sarrafzadeh, "New Approximation Results on Graph Matching and Related Problems," Proc. 20th Int'l Workshop, WG '94, pp. 343-358,Herrsching, Germany, June 1994.
[20] S. Liu, K. Pan, and M. Pedram, "Alleviating Routing Congestion by Combining Logic Resynthesis and Linear Placement," Proc. European Design Automation Conf., pp. 578-582, 1993.
[21] S. Sahni and T. Gonzales, “P-Complete Approximation Problems,” J. ACM, vol. 23, pp. 555-565, 1976.
[22] M. Sriram and S.M. Kang, "Detailed Layer Assignment for MCM Routing," Proc. Int'l Conf. Computer-Aided Design, pp. 386-389, 1992.
[23] R.S. Tsay and E.S. Kuh, "A Unified Approach to Partitioning and Placement," IEEE Trans. Circuits and Systems, vol. 38, no. 5, May 1991.
[24] H. Vaishnav and M. Pedram, "A Performance Driven Placement Algorithm for Low Power Designs," Proc. European Design Automation Conf., 1993.
[25] G. Vijayan.,"Generalization of Min-Cut Partitioning to Tree Structures and Its Applications," IEEE Trans. Computers, vol. 40, no. 3, Mar. 1991.
[26] P.M.B. Vitányi, "How Well Can a Graph Be n-Colored?" Discrete Math., vol. 34, pp. 69-80, 1981.
[27] M. Yannakakis, "Edge-Deletion Problems," SIAM J. Computing, vol. 10, pp. 297-309, 1981.
[28] M. Yannakakis, "On the Approximation of Maximum Satisfiability," Proc. Third Ann. ACM-SIAM Symp. Discrete Algorithms, pp. 1-8, 1992.

Index Terms:
VLSI partitioning, maximum cut, k-Coloring, k-Color Ordering, approximation algorithm.
Jun-Dong Cho, Salil Raje, Majid Sarrafzadeh, "Fast Approximation Algorithms on Maxcut, k-Coloring, and k-Color Ordering for VLSI Applications," IEEE Transactions on Computers, vol. 47, no. 11, pp. 1253-1266, Nov. 1998, doi:10.1109/12.736440
Usage of this product signifies your acceptance of the Terms of Use.