This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
Location of Stuck-At Faults and Bridging Faults Based on Circuit Partitioning
October 1998 (vol. 47 no. 10)
pp. 1124-1135

Abstract—We propose a method of fault diagnosis at the chip level that reduces the number of simulations required to locate defect site(s) by logically partitioning the circuit into subcircuits. Candidate subcircuits that potentially contain the defect site(s) are identified and further partitioned until the defect site is located with the required resolution. Both stuck-at faults and nonfeedback bridging faults are considered as target fault models to represent defects. At the base of the fault location procedure is a procedure to identify subcircuits that potentially contain the fault site. This procedure is matched to the fault model being considered, thus allowing the same partitioning scheme to be applied to various fault models. The procedure presented here is applicable to combinational and fully scanned sequential circuits. Experimental results are presented to demonstrate the effectiveness of circuit partitioning in reducing the number of fault simulations required to locate a fault.

[1] E.J. McCluskey, "Test and Diagnosis Procedure for Digital Networks," Computer, pp. 17-20, Jan. 1971.
[2] R.E. Tulloss, "Size Optimization of Fault Dictionaries," Proc. 1978 Semiconductor Test Conf., pp. 264-265, 1978.
[3] M. Abramovici and M.A. Breuer, "Fault Diagnosis Based on Effect-Cause Analysis: An Introduction," Proc. 17th Design Automation Conf., pp. 69-76, June 1980.
[4] R.E. Tulloss, "Fault Dictionary Compression: Recognizing when a Fault May Be Unambiguously Represented by a Single Failure Detection," Proc. 1980 Test Conf., pp. 368-370, Nov. 1980.
[5] Y. Azounamian and J.A. Waicukauski, "Fault Diagnosis in an LSSD Environment," Proc. 1981 Int'l Test Conf., pp. 86-88, Sept. 1981.
[6] J. Savir and J.P. Roth, "Testing for and Distinguishing Between Failures," Proc. 12th Int'l Symp. Fault-Tolerant Computing, pp. 165-172, June 1982.
[7] J. Richman and K.R. Bowden, "The Modern Fault Dictionary," Proc. 1985 Int'l Test Conf., pp. 696-702, Sept. 1985.
[8] V. Ratford and P. Keating, "Integrating Guided Probe and Fault Dictionary: An Enhanced Diagnostic Approach," Proc. Int'l Test Conf., pp. 304-311, 1986.
[9] J.A. Waicukauski, V.P. Gupta, and S.T. Patel, "Diagnosis of BIST Failures by PPSFP Simulation," Proc. 1987 Int'l Test Conf., pp. 480-484, Sept. 1987.
[10] H. Cox and J. Rajski, "A Method of Fault Analysis for Test Generation and Fault Diagnosis," IEEE Trans. Computer-Aided Design, July 1988.
[11] J.A. Waicukauski and E. Lindbloom, "Failure Diagnosis of Structured VLSI," IEEE Design&Test of Computers, Vol. 6, No. 4, Aug. 1989, pp. 49-60.
[12] M. Abramovici, M.A. Breuer, and A.D. Friedman, Digital Systems Testing and Testable Design. Computer Science Press, 1990.
[13] P. Camurati, A. Lioy, P. Prinetto, and M. Sonza Reorda, "Diagnosis Oriented Test Pattern Generation," Proc. European Design Automation Conf., pp. 470-474, Mar. 1990.
[14] R.C. Aitken, "Fault Location with Current Monitoring," Proc. 1991 Int'l Test Conf., pp. 623-632, Oct. 1991.
[15] P.G. Ryan, S. Rawat, and W.K. Fuchs, "Two-Stage Fault Location," Proc. 1991 Int'l Test Conf., pp. 963-968, Oct. 1991.
[16] M. Marzouki, J. Laurent, and B. Courtois, "Coupling Electron-Beam Probing with Knowledge-Based Fault Localization," Proc. 1991 Int'l Test Conf., pp. 238-247, Oct. 1991.
[17] T. Gruning, U. Mahlstedt, and H. Koopmeiners, "DIATEST: A Fast Diagnostic Test Pattern Generator for Combinational Circuits," Proc. Int'l Conf. Computer-Aided Design, pp. 194-197, Nov. 1991.
[18] K. Kubiak, S. Parkes, W. K. Fuchs, and R. Saleh, "Exact Evaluation of Diagnostic Test Resolution," Proc. 29th Design Automation Conf, pp. 347-352, June 1992.
[19] E. Rudnick, W. Fuchs, and J. Patel, "Diagnostic Fault Simulation of Sequential Circuits," Proc. 1992 IEEE Int'l Test Conf., IEEE CS Press, 1992, pp. 178-186.
[20] I. Pomeranz and S.M. Reddy, "On the Generation of Small Dictionaries for Fault Location," Proc. 1992 Int'l Conf. Computer-Aided Design, pp. 272-279, Nov. 1992.
[21] I. Pomeranz and S M. Reddy, "On Error Correction in Macro-Based Circuits," Proc. 1994 Int'l Conf. Computer-Aided Design, pp. 568-575, Nov. 1994.
[22] S.D. Millman, E.J. McCluskey, and J.M. Acken, "Diagnosing CMOS Bridging Faults with Stuck-At Fault Dictionaries," Proc. 1990 Int'l Test Conf., pp. 860-870, Sept. 1990.
[23] S. Chakravarty and Y. Gong, "An Algorithm for Diagnosing Two-Line Bridging Faults in Combinational Circuits," Proc. 1993 Design Automation Conf., pp. 520-524, June 1993.
[24] B. Chess, D.B. Lavo, F.J. Ferguson, and T. Larrabee, "Diagnosis of Realistic Bridging Faults with Single Stuck-At Information," Proc. 1995 Int'l Conf. Computer-Aided Design, pp. 185-192, Nov. 1995.
[25] R.C. Aitken and P.C. Maxwell, "Better Models or Better Algorithms? Techniques to Improve Fault Diagnosis," HP J., pp. 110-116, Feb. 1995.
[26] R.C. Aitken, "A Comparison of Defect Models for Fault Location with IddqMeasurements," Proc. 1992 Proc. Int'l Test Conf., pp. 778-787, Sept. 1992.
[27] S. Chakravarty and M. Liu, "Algorithms for Current Monitor Based Diagnosis of Bridging and Leakage Faults," Proc. 1992 Design Automation Conf., pp. 353-356, June 1992.
[28] I. Pomeranz, L.N. Reddy, and S.M. Reddy, "COMPACTEST: A Method to Generate Compact Test Sets for Combinational Circuits," Proc. 1991 Int'l Test Conf., pp. 194-203, Oct. 1991.
[29] S.M. Reddy, I. Pomeranz, and S. Kajihara, "On the Effects of Test Compaction on Defect Coverage," Proc. 14th VLSI Test Symp., pp. 430-435, Apr. 1996.

Index Terms:
Circuit partitioning, fault diagnosis.
Citation:
Irith Pomeranz, Sudhakar M. Reddy, "Location of Stuck-At Faults and Bridging Faults Based on Circuit Partitioning," IEEE Transactions on Computers, vol. 47, no. 10, pp. 1124-1135, Oct. 1998, doi:10.1109/12.729795
Usage of this product signifies your acceptance of the Terms of Use.