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Romesh M. Jessani, Michael Putrino, "Comparison of Single and DualPass MultiplyAdd Fused FloatingPoint Units," IEEE Transactions on Computers, vol. 47, no. 9, pp. 927937, September, 1998.  
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@article{ 10.1109/12.713312, author = {Romesh M. Jessani and Michael Putrino}, title = {Comparison of Single and DualPass MultiplyAdd Fused FloatingPoint Units}, journal ={IEEE Transactions on Computers}, volume = {47}, number = {9}, issn = {00189340}, year = {1998}, pages = {927937}, doi = {http://doi.ieeecomputersociety.org/10.1109/12.713312}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }  
RefWorks Procite/RefMan/Endnote  x  
TY  JOUR JO  IEEE Transactions on Computers TI  Comparison of Single and DualPass MultiplyAdd Fused FloatingPoint Units IS  9 SN  00189340 SP927 EP937 EPD  927937 A1  Romesh M. Jessani, A1  Michael Putrino, PY  1998 KW  Floatingpoint unit KW  multiplyadd fused KW  multiply array KW  alignment shifter KW  sign encoding KW  Booth encoding. VL  47 JA  IEEE Transactions on Computers ER   
Abstract—Low power, low cost, and high performance factors dictate the design of many microprocessors targeted to the lowpower computing market. The floatingpoint unit occupies a significant percentage of the silicon area in a microprocessor due its wide data bandwidth (for doubleprecision computations) and the area occupied by the multiply array. For microprocessors designed for portable products, the designsize of the floatingpoint unit plays an important role in the low cost factor driven by reduced chip area. Some microprocessors have multiplyadd fused floatingpoint units with a reduced multiply array, requiring two passes through the array for operations involving doubleprecision multiplies. This paper discusses the design complexities around the dualpass multiply array and its effect on area and performance. Floatingpoint unit areas and their associated multiply array areas are compared for a single and dualpass implementation in a given technology (PowerPC 604eTM and PowerPC 603eTM microprocessors, respectively).
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