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H.c. Card, G.k. Rosendahl, D.k. McNeill, R.d. McLeod, "Competitive Learning Algorithms and Neurocomputer Architecture," IEEE Transactions on Computers, vol. 47, no. 8, pp. 847858, August, 1998.  
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@article{ 10.1109/12.707586, author = {H.c. Card and G.k. Rosendahl and D.k. McNeill and R.d. McLeod}, title = {Competitive Learning Algorithms and Neurocomputer Architecture}, journal ={IEEE Transactions on Computers}, volume = {47}, number = {8}, issn = {00189340}, year = {1998}, pages = {847858}, doi = {http://doi.ieeecomputersociety.org/10.1109/12.707586}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }  
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TY  JOUR JO  IEEE Transactions on Computers TI  Competitive Learning Algorithms and Neurocomputer Architecture IS  8 SN  00189340 SP847 EP858 EPD  847858 A1  H.c. Card, A1  G.k. Rosendahl, A1  D.k. McNeill, A1  R.d. McLeod, PY  1998 KW  Computer architecture KW  parallel processing KW  neurocomputers KW  field programmable devices KW  artificial neural networks KW  competitive learning KW  selforganizing feature maps. VL  47 JA  IEEE Transactions on Computers ER   
Abstract—This paper begins with an overview of several competitive learning algorithms in artificial neural networks, including selforganizing feature maps, focusing on properties of these algorithms important to hardware implementations. We then discuss previously reported digital implementations of these networks. Finally, we report a reconfigurable parallel neurocomputer architecture we have designed using digital signal processing chips and fieldprogrammable gate array devices. Communications are based upon a broadcast network with FPGAbased message preprocessing and postprocessing. A small prototype of this system has been constructed and applied to competitive learning in selforganizing maps. This machine is able to model slowlyvarying nonstationary data in real time.
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