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IEEE Transactions on Computers
May 1998 (vol. 47 no. 5)
ISSN: 0018-9340
Table of Contents
PAPERS
A Performance Study of Instruction Cache Prefetching Methods
(Abstract)
Wei-Chung Hsu
James E. Smith
pp. 497-508
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CPU Cache Prefetching: Timing Evaluation of Hardware Implementations
(Abstract)
John Tse
Alan Jay Smith
pp. 509-526
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An Efficient Solution to the Cache Thrashing Problem Caused by True Data Sharing
(Abstract)
Guohua Jin
Zhiyuan Li
Fujie Chen
pp. 527-543
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Theory and Design of Adjacent Asymmetric Error Masking Codes
(Abstract)
Luca G. Tallini
Bella Bose
pp. 544-555
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Design of Balanced and Constant Weight Codes for VLSI Systems
(Abstract)
Luca G. Tallini
Bella Bose
pp. 556-572
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A Configurable Membership Service
(Abstract)
Matti A. Hiltunen
Richard D. Schlichting
pp. 573-586
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Double Step Branching CORDIC: A New Algorithm for Fast Sine and Cosine Generation
(Abstract)
Dhananjay S. Phatak
pp. 587-602
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Damage Assessment for Optimal Rollback Recovery
(Abstract)
Tein-Hsiang Lin
Kang G. Shin
pp. 603-613
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Architecture Scalability of Parallel Vector Computers with a Shared Memory
(Abstract)
Eskil Dekker
pp. 614-624
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