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| Yutai Ma, "A Simplified Architecture for Modulo (2n + 1) Multiplication," IEEE Transactions on Computers, vol. 47, no. 3, pp. 333-337, March, 1998. | |||
| BibTex | x | ||
| @article{ 10.1109/12.660169, author = {Yutai Ma}, title = {A Simplified Architecture for Modulo (2n + 1) Multiplication}, journal ={IEEE Transactions on Computers}, volume = {47}, number = {3}, issn = {0018-9340}, year = {1998}, pages = {333-337}, doi = {http://doi.ieeecomputersociety.org/10.1109/12.660169}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - JOUR JO - IEEE Transactions on Computers TI - A Simplified Architecture for Modulo (2n + 1) Multiplication IS - 3 SN - 0018-9340 SP333 EP337 EPD - 333-337 A1 - Yutai Ma, PY - 1998 KW - Convolution KW - Fermat number transform KW - RNS arithmetic KW - modulo (2n + 1) multiplication KW - Booth's algorithm KW - Wallace tree KW - carry save adder KW - CSA array KW - carry lookahead adder. VL - 47 JA - IEEE Transactions on Computers ER - | |||
Abstract—The modulo (2
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