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| Ahmed El-Amawy, Priyalal Kulasinghe, "On the Complexity of Designing Optimal Branch-and-Combine Clock Networks," IEEE Transactions on Computers, vol. 47, no. 2, pp. 264-269, February, 1998. | |||
| BibTex | x | ||
| @article{ 10.1109/12.664212, author = {Ahmed El-Amawy and Priyalal Kulasinghe}, title = {On the Complexity of Designing Optimal Branch-and-Combine Clock Networks}, journal ={IEEE Transactions on Computers}, volume = {47}, number = {2}, issn = {0018-9340}, year = {1998}, pages = {264-269}, doi = {http://doi.ieeecomputersociety.org/10.1109/12.664212}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - JOUR JO - IEEE Transactions on Computers TI - On the Complexity of Designing Optimal Branch-and-Combine Clock Networks IS - 2 SN - 0018-9340 SP264 EP269 EPD - 264-269 A1 - Ahmed El-Amawy, A1 - Priyalal Kulasinghe, PY - 1998 KW - Clock network KW - optimal design KW - skew bound KW - computational complexity KW - branch-and-combine network KW - graph orientation. VL - 47 JA - IEEE Transactions on Computers ER - | |||
Abstract—Recently, an unconventional clock distribution scheme, called Branch-and-Combine (
In this paper, we study the complexity of the general problem of designing a minimum cost
[1] A. El-Amawy, "Branch-and-Combine Clocking of Arbitrarily Large Computing Networks," Proc. Intl. Conf. Parallel Processing, pp. I-409-I-417,St. Charles, Ill., Aug 1991.
[2] A. El-Amawy, "Arbitrarily Large Clock Networks with Constant Skew Bound," U.S. Patent Number 5,163,068, 1992.
[3] A. El-Amawy, "Clocking Arbitrarily Large Computing Structures Under Constant Skew Bound," IEEE Trans. Parallel and Distributed Systems, vol. 4, no. 3, pp. 241-255, Mar. 1993.
[4] A. El-Amawy and P. Kulasinghe, "Properties of Generalized Branch and Combine Networks," IEEE Trans. Parallel and Distributed Systems, vol. 6, no. 5, pp. 541-546, May 1995.
[5] U. Maheshwar and El-Amawy, "Generalized Algorithms for Systematic Synthesis of Branch-and-Combine Clock Networks for Meshes and Tori," IEEE Trans. Parallel and Distributed Systems, vol. 6, no. 12, pp. 1,283-1,300, Dec. 1995.
[6] A. El-Amawy and U. Maheshwar, "A Comparative Study of Synchronous Clocking Schemes for VLSI Based Systems," J. VLSI Design, vol. 3, no. 1, pp. 81-92, 1995.
[7] M.R. Garey and D.S. Johnson, Computers and Intractability: A Guide to the Theory of NP-Completeness.New York: W.H. Freeman, 1979.
[8] R. Gould, Graph Theory.Menlo Park, Calif.: Benjamin Cummings, 1988

