This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
A Parallel Algorithm for State Assignment of Finite State Machines
February 1998 (vol. 47 no. 2)
pp. 242-246

Abstract—Optimization of large sequential circuits has become unmanageable in CAD of VLSI due to time and memory requirements. We report a parallel algorithm for the state assignment problem for finite state machines. Our algorithm has three significant contributions: It is an asynchronous parallel algorithm portable across different MIMD machines. Time and memory requirements reduce linearly with the number of processors, enabling the parallel implementation to handle large problem sizes. The quality of the results for multiprocessor runs remains comparable to the serial algorithm on which it is based due to an implicit backtrack correction mechanism built into the parallel implementation.

[1] S. Devdas, H. Ma, A.R. Newton, and A. Sangiovanni-Vincentelli, "MUSTANG: State Assignment of Finite State Machines Targeting Multilevel Logic Implementations," IEEE Trans. Computer-Aided Design, pp. 1,290-1,300, Dec. 1988.
[2] S. Parkes, J.A. Chandy, and P. Banerjee, "A Library-Based Approach to Portable, Parallel, Object-Oriented Programming: Interface, Implementation, and Application," Proc. Supercomputing '94, pp. 69-78,Washington, D.C., Nov. 1994.
[3] P. Ashar, A. Ghosh, S. Devadas, and A. Newton, "Implicit State Transition Graphs: Applications to Sequential Logic Synthesis and Test," Proc. Int'l Conf. Computer-Aided Design, pp. 84-87, Nov. 1990.
[4] P. Ashar, S. Devadas, and A. Newton, "Optimum and Heuristic Algorithms for Finite State Machine Decomposition and Partitioning," Proc. Int'l Conf. Computer-Aided Design, Nov. 1989.
[5] G. Hasteer and P. Banerjee, "Simulated Annealing Based Parallel Algorithm for State Assignment of Finite State Machines," Proc. VLSI Design,Hyderabad, India, Jan. 1997.
[6] G. Hasteer, "Parallel Algorithms for State Assignment of Finite State Machines," MS thesis, Univ. of Illinois at Urbana-Champaign, Dec. 1995, Technical Report CRHC-96-02/UILU-ENG-96-2202.

Index Terms:
Encoding, state assignment, linear speedup, portable, conflict resolution.
Citation:
Gagan Hasteer, Prithviraj Banerjee, "A Parallel Algorithm for State Assignment of Finite State Machines," IEEE Transactions on Computers, vol. 47, no. 2, pp. 242-246, Feb. 1998, doi:10.1109/12.663772
Usage of this product signifies your acceptance of the Terms of Use.