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Compression-Based Program Characterization for Improving Cache Memory Performance
November 1997 (vol. 46 no. 11)
pp. 1174-1186

Abstract—It is well known that compression and prediction are interrelated in that high compression implies good predictability, and vice versa. We use this correlation to find predictable properties of program behavior and apply them to appropriate cache management tasks. In particular, we look at two properties of program references: 1) Inter Reference Gaps: defined as the time interval between successive references to the same address by the processor, and 2) Cache Misses: references which access the next level of the memory hierarchy. Using compression, we show that these two properties are highly predictable and exploit them to improve Cache Replacement and Cache Prefetching, respectively.

Using trace-driven simulations on SPEC and Dinero benchmarks, we demonstrate the performance of our predictive schemes, and compare them with other methods for doing the same. We show that, using our predictive replacement scheme, miss ratio in cache memories can be improved up to 43 percent over the well-known Least Recently Used (LRU) algorithm, which covers the gap between the LRU and the off-line optimal (MIN) miss ratios, by more than 84 percent. For cache prefetching, we show that our scheme eliminates up to 62 percent of the total misses in D-caches. An equivalent sequential prefetch scheme only removes up to 42 percent of the misses. For I-caches, our scheme performs almost the same as the sequential scheme and removes up to 78 percent of the misses.

[1] R.H. Patterson, G. Gibson, E. Ginting, D. Stodolsky, and J. Zelenka, "Informed Prefetching and Caching," Proc. 15th ACM Symp. Operating Systems Principles, pp. 79-95, Dec. 1995.
[2] P. Cao, E.W. Felten, A.R. Karlin, and K. Li, "Implementation and Performance of Integrated Application-Controlled Caching, Prefetching and Disk Scheduling," Technical Report PRINCETONCS: TR-493-95, Princeton Univ., 1995.
[3] K.M. Curewitz, P. Krishnan, and J.S. Vitter, Practical Prefetching via Data Compression Proc. ACM Conf. Management of Data (ACM SIGMOD '93), pp. 257-266, June 1993.
[4] M. Palmer and S.B. Zdonik, “Fido: A Cache that Learns to Fetch,” Proc. 17th Int'l Conf. Very Large Data Bases, pp. 255–262, Sept. 1991.
[5] D. Thiebaut and H.S. Stone, "Footprints in the Cache," ACM Trans. Computer Systems, vol. 5, pp. 305-329, Nov. 1987.
[6] H.S. Stone, J. Turek, and J.L. Wolf, "Optimal Partitioning of Cache Memory," IEEE Trans. Computers, vol. 41, no. 9, pp. 1,054-1,068, Sept. 1992.
[7] C.K. Chow, "On Optimization of Storage Hierarchy," IBM J. Research and Development, vol. 18, pp. 194-203, May 1974.
[8] J. Voldman, B. Mandelbrot, L.W. Hoevel, J. Knight, and P. Rosenfeld, "Fractal Nature of Software-Cache Interactions," IBM J. Research and Development, vol. 27, pp. 164-170, Mar. 1983.
[9] D. Thiébaut, "On the Fractal Dimension of Computer Programs and Its Application to the Prediction of the Cache Miss Ratio," IEEE Trans. Computers, vol. 38, no. 7, July 1989.
[10] D. Thiebaut, "Synthetic Traces for Trace-Driven Simulation of Cache Memories," IEEE Trans. Computers, vol. 41, no. 4, pp. 388-410, Apr. 1992.
[11] J.P. Singh, H.S. Stone, and D.F. Thiebaut, "A Model of Workloads and Its Use in Miss-Rate Prediction for Fully Associative Caches," IEEE Trans. Computers, vol. 41, no. 7, pp. 811-825, July 1992.
[12] J. Ziv and A. Lempel, "Compression of Individual Sequence via Variable-Rate Coding," IEEE Trans. Information Theory, vol. 24, no. 5, pp. 530-536, 1978.
[13] V. Phalke and B. Gopinath, "An Inter-Reference Gap Model for Temporal Locality in Program Behavior," Proc. ACM SIGMETRICS 1995 Conf. Measurement&Modeling of Computer Systems, May 1995.
[14] V. Phalke and B. Gopinath, "A Miss History Based Architecture for Cache Prefetching," Proc. Int'l Workshop Memory Management, Lecture Notes in Computer Science, vol. 986, pp. 381-398. Springer-Verlag, Sept. 1995.
[15] D.T. Harper III and Y. Costa, "Analytical Estimation of Vector Access Performance in Parallel Memory Architectures," IEEE Trans. Computers, vol. 42, no. 5, pp. 616-624, May 1993.
[16] I. Song and T. Cho, "Page Prefetching Based on Fault History," Proc. USENIX Mach III Symp., Apr. 1993.
[17] J. Griffioen and R. Appleton, "Reducing File System Latency Using a Predictive Approach," Proc. Summer 1994 USENIX Conf., June 1994.
[18] J.K. Flanagan, B. Nelson, J. Archibald, and K. Grimsrud, "BACH: BYU Address Collection Hardware; the Collection of Complete Traces," Proc. Int'l Workshop Modeling Techniques and Tools for Computer Performance Evaluation, Sept. 1992.
[19] J.L. Hennessy and D.A. Patterson, Computer Architecture: A Quantitative Approach, Morgan Kaufmann, San Mateo, Calif., 1990.
[20] J. Rothstein,“Bus Automata, Brains, and Mental Models,” IEEE Trans. on Systems, Man, and Cybernetics, vol. 18, no. 4, pp. 522-531, Apr. 1988.
[21] J. Ziv and A. Lempel, "A Universal Algorithm for Sequential Data Compression," IEEE Trans. Information Theory, vol. 23, no. 3, pp. 337-343, 1977.
[22] J.A. Storere, Data Compression Methods and Theory.Rockville, Md.: Computer Science Press, 1988.
[23] E.J. O'Neil, P.E. O'Neil, and G. Weikum, "The LRU-k Page Replacement Algorithm for Database Disk Buffering," Proc. 1993 ACM Sigmod Int'l Conf. Management of Data, ACM Press, New York, 1993, pp. 297-306.
[24] O.I. Aven, L.B. Boguslavsky, and Y.A. Kogan, "Some Results on Distribution-Free Analysis of Paging Algorithms," IEEE Trans. Computers, vol. 25, no. 7, pp. 737-745, July 1976.
[25] J.T. Robinson and M.V. Devarakonda, "Data Cache Management Using Frequency-Based Replacement," Proc. 1990 ACM SIGMETRICS Conf. Measurement&Modeling of Computer Systems, May 1990.
[26] J. Rissanen, "A Universal Data Compression System," IEEE Trans. Information Theory, vol. 29, pp. 656-664, Sept. 1983.
[27] V. Phalke and B. Gopinath, "Program Modelling via Inter-Reference Gaps and Applications," Proc. IEEE Int'l Workshop Modeling, Analysis, and Simulation of Computer and Telecommunication Systems, Jan. 1995.

Index Terms:
Data compression, prediction, cache replacement, cache prefetching, trace-driven simulation.
Vidyadhar Phalke, B. Gopinath, "Compression-Based Program Characterization for Improving Cache Memory Performance," IEEE Transactions on Computers, vol. 46, no. 11, pp. 1174-1186, Nov. 1997, doi:10.1109/12.644292
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