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Signed-Digit Architecture for Residue to Binary Transformation
October 1997 (vol. 46 no. 10)
pp. 1146-1150

Abstract—A residue to binary converter architecture based on the Chinese Remainder Theorem (CRT) is presented. This is achieved by introducing a general moduli set Sk

$$S^k=\left\{ {2^m-1,\,\,2^{2^0m}+1,\,\,2^{2^1m}+1,\,\,2^{2^2m}+1,\,\,\ldots ,\, \,2^{2^km}+1} \right\}$$for Residue Number System (RNS) applications. Residue to binary converter architectures based on moduli sets S0 = {2m− 1, 2m + 1} and S1 = {2m− 1, 2m + 1, 22m + 1} are developed. The conversion procedure is performed in the following three levels:

•   residue to signed-digit,•   signed-digit to binary,•   end-around carry addition/subtraction.

In the first level of operation, the signed-digit representation of the CRT equation is realized by using redundant adder/subtractor blocks. Here, the necessary embedded multiplications are replaced by simple shift-left operations and the carry propagation is totally eliminated. In the second level, the redundant representation of CRT is directly converted to binary format. Finally, an end-around carry (EAC) addition/subtraction is performed to obtain the result at the third level of operation. The proposed architectures are simple, fast, free of memory blocks and modulo adders.

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Index Terms:
VLSI arithmetic algorithms, residue number systems, residue to binary conversion, signed-digit number systems, Chinese remainder theorem, digital signal processing.
Citation:
F. Pourbigharaz, H.m. Yassine, "Signed-Digit Architecture for Residue to Binary Transformation," IEEE Transactions on Computers, vol. 46, no. 10, pp. 1146-1150, Oct. 1997, doi:10.1109/12.628400
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