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A Tabular Method for Guard Strengthening, Symmetrization, and Operator Reduction for Martin's Asynchronous Design Methodology
September 1997 (vol. 46 no. 9)
pp. 1050-1054

Abstract—We introduce a tabular method to perform the last two of the four phases of Martin's compilation process for asynchronous circuit design. The method is then demonstrated with three examples, illustrating that our systematic method is very straightforward, flexible, and convenient to apply, and, hence, it lends itself to automatic compilation.

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Index Terms:
Asynchronous sequential circuits, delay insensitive circuits, formal program transformation, guarded commands, self-timed logic, signal transition graphs (STG), speed independent circuits.
Citation:
Nozar Tabrizi, Michael J. Liebelt, Kamran Eshraghian, "A Tabular Method for Guard Strengthening, Symmetrization, and Operator Reduction for Martin's Asynchronous Design Methodology," IEEE Transactions on Computers, vol. 46, no. 9, pp. 1050-1054, Sept. 1997, doi:10.1109/12.620487
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