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Complexity Analysis of the Cost-Table Approach to the Design of Multiple-Valued Logic Circuits
February 1997 (vol. 46 no. 2)
pp. 205-209

Abstract—We analyze the computational complexity of the cost-table approach to designing multiple-valued logic circuits that is applicable to I2L, CCDs, current-mode CMOS, and RTDs. We show that this approach is NP-complete. An efficient algorithm is shown for finding the exact minimal realization of a given function by a given cost-table.

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Index Terms:
Computational complexity, cost-table, cost function, logic design, minimization, multiple-valued logic, NP-complete, synthesis.
Citation:
Kriss A. Schueller, Jon T. Butler, "Complexity Analysis of the Cost-Table Approach to the Design of Multiple-Valued Logic Circuits," IEEE Transactions on Computers, vol. 46, no. 2, pp. 205-209, Feb. 1997, doi:10.1109/12.565599
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