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Huapeng Wu, M. Anwarul Hasan, "Efficient Exponentiation of a Primitive Root in GF(2m)," IEEE Transactions on Computers, vol. 46, no. 2, pp. 162172, February, 1997.  
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@article{ 10.1109/12.565591, author = {Huapeng Wu and M. Anwarul Hasan}, title = {Efficient Exponentiation of a Primitive Root in GF(2m)}, journal ={IEEE Transactions on Computers}, volume = {46}, number = {2}, issn = {00189340}, year = {1997}, pages = {162172}, doi = {http://doi.ieeecomputersociety.org/10.1109/12.565591}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }  
RefWorks Procite/RefMan/Endnote  x  
TY  JOUR JO  IEEE Transactions on Computers TI  Efficient Exponentiation of a Primitive Root in GF(2m) IS  2 SN  00189340 SP162 EP172 EPD  162172 A1  Huapeng Wu, A1  M. Anwarul Hasan, PY  1997 KW  Exponentiation KW  Galois or finite fields KW  signed digit number KW  minimal representation KW  LFSR KW  primitive root. VL  46 JA  IEEE Transactions on Computers ER   
Abstract—In this paper, exponentiation of a primitive root in GF(2
[1] W. Diffie and M.E. Hellman, New Directions in Cryptography IEEE Trans. Information Theory, vol. 22, pp. 644654, 1976.
[2] G.B. Agnew, R.C. Mullin, I. Onyszchuk, and S.A. Vanstone, "An Implementation for a Fast Public Key Cryptosystem," J. Cryptology, vol. 3, pp. 6379 1991.
[3] D.W. Ash, I.F. Blake, and S.A. Vanstone, “Low Complexity Normal Bases,” Discrete Applied Math., vol. 25, pp. 191210, 1989.
[4] A. Avizienis, "SignedDigit Number Representations for Fast Parallel Arithmetic," IRE Trans. Electronic Computers, vol. 10, pp. 389400, 1961.
[5] G.W. Reitwiesner, "Binary Arithmetic," Advanced Computers 1, pp. 232308 Academic Press, 1960.
[6] H.L. Garner, "Number Systems and Arithmetic," Advanced Computers 6, pp. 131194. Academic Press, 1965.
[7] A.D. Booth, "A Signed Binary Multiplication Technique," Quarterly J. Mechanical and Applied Math., vol. 4, Pt. 2, pp. 236240, 1951.
[8] B. Parhami, "Generalized SignedDigit Number Systems: A Unifying Framework for Redundant Number Representations," IEEE Trans. Computers, vol. 39, no. 1, pp. 8998, Jan. 1990.
[9] W.E. Clark and J.J. Liang, On Arithmetic Weight for a General Radix Representation of Integers IEEE Trans. Information Theory, vol. 19, no. 6, pp. 823826, 1973.
[10] S. Arno and F.S. Wheeler, Signed Digit Representations of Minimal Hamming Weight IEEE Trans. Computers, vol. 42, no. 8, pp. 10071010, Aug. 1993.
[11] C.S. Wallace, "A Suggestion for a Fast Multiplier," IEEE Trans. Electronic Computers, vol. 14, no. 1, pp. 1417, Feb. 1964.
[12] D.E. Atkins, "Design of the Arithmetic Units of Illiac III: Use of Redundancy and Higher Radix Methods," IEEE Trans. Computers, vol. 9, no. 8, pp. 720733, Aug. 1970.
[13] K. Hwang, Computer Arithmetic.New York: Wiley, 1979.
[14] J. Jedwab and C.J. Mitchell, Minimum Weight Modified SignedDigit Representations and Fast Exponentiation Electronics Letters, vol. 25, no. 17, pp. 11711172, 1989.
[15] E.F. Brickell, D.M. Gordon, K.S. McCurley, and D.B. Wilson, "Fast Exponentiation with Precomputation (Extended Abstract)," Proc. EUROCRYPT '92 pp. 200207, LNCS 658, Springer Verlag, 1992.
[16] T. Beth, B.M. Cook, and D. Gollmann, "Architectures for Exponentiation in GF(2n)," Advances in CryptologyCRYPTO '86, pp. 302310, LNCS 263.
[17] P.A. Scott, S.J. Simmons, S.E. Tavares, and L.E. Peppard, Architectures for Exponentiation in$GF(2^m)$ IEEE J. Selected Areas in Comm., vol. 6, no. 3, pp. 578586, Apr. 1988.
[18] E.D. Mastrovito, "VLSI Architectures for Computations in Galois Fields," PhD dissertation, Linköping Univ., Linköping, Sweden, 1991.
[19] B. Arazi, "Architectures for Exponentiation Over GF(2m) Adopted for Smartcard Application," IEEE Trans. Computers, vol. 42, no. 4, pp. 494497, Apr. 1993.
[20] M.A. Hasan and V.K. Bhargava, "Architecture for a Low Complexity RateAdaptive ReedSolomon Encoder," IEEE Trans. Computers, vol. 44, no. 7, pp. 938942, July 1995.
[21] C. Paar, "Efficient VLSI Architectures for BitParallel Computation in Galois Fields," PhD dissertation, Informatik Kommunikationstechnik, VDIVerlag, Düsseldorf, 1994.
[22] M.A. Hasan, M.Z. Wang, and V.K. Bhargava, “A Modified MasseyOmura Parallel Multiplier for a Class of Finite Fields,” IEEE Trans. Computers, vol. 42, no. 10, pp. 12781280, Oct. 1993.
[23] M.A. Hasan, M. Wang, and V.K. Bhargava, Modular Construction of Low Complexity Parallel Multipliers for a Class of Finite Fields$GF(2^m)$ IEEE Trans. Computers, vol. 41, no. 8, pp. 962971, Aug. 1992.
[24] J.A. Gordon, "Very Simple Method to Find the Minimal Polynomial of an Arbitrary Nonzero Element of a Finite Field," Electronics Letters, vol. 12, pp. 663664, 1976.
[25] C.C. Wang and D. Pei, "A VLSI Design for Computing Exponentiation in GF(2m) and Its Application to Generate Pseudorandom Number Sequences," IEEE Trans. Computers, vol. 39, no. 2, pp. 258262, Feb. 1990.
[26] I.F. Blake, X. Gao, R.C. Mullin, S.A. Vanstone, and T. Yaghoobian, Applications of Finite Fields, A.J. Menezes, ed. Kluwer Academic, 1993.