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Issue No.01 - January (1997 vol.46)
pp: 75-79
ABSTRACT
<p><b>Abstract</b>—Using a prime number <it>p</it> of memory banks on a vector processor allows a conflict-free access for any slice of <it>p</it> consecutive elements of a vector stored with a stride not multiple of <it>p</it>. To reject the use of a prime number of memory banks, it is generally advanced that address computation for such a memory system would require systematic Euclidean division by the number <it>p</it>. The Chinese Remainder Theorem allows a simple mapping of data onto the memory banks for which address computation does not require any Euclidean division. However, this requires that the number of words in each memory module <it>m</it> and <it>p</it> be relatively prime. We propose a method based on the Chinese Remainder Theorem for moduli with common factors that does not have such a restriction. The proposed method does not require Euclidean division and also results in an efficient error detection/correction mechanism for address translation.</p>
INDEX TERMS
Address translation, error correction, error detection, logical address, memory systems, physical address, vector processors.
CITATION
Rajendra S. Katti, "Nonprime Memory Systems and Error Correction in Address Translation", IEEE Transactions on Computers, vol.46, no. 1, pp. 75-79, January 1997, doi:10.1109/12.559804