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IEEE Transactions on Computers
January 1997 (vol. 46 no. 1)
ISSN: 0018-9340
Table of Contents
PAPERS
Analysis of Dual-Link Networks for Real-Time Applications
(Abstract)
Lui Sha
Shirish S. Sathaye
Jay K. Strosnider
pp. 1-13
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Crash Resilient Communication in Dynamic Networks
(Abstract)
Shlomi Dolev
Jennifer L. Welch
pp. 14-26
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Secure Communication with Chaotic Systems of Difference Equations
(Abstract)
Stergios Papadimitriou
Anastasios Bezerianos
Tassos Bountis
pp. 27-38
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A Graph Partitioning Approach to Sequential Diagnosis
(Abstract)
Sanjeev Khanna
W. Kent Fuchs
pp. 39-47
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On Dictionary-Based Fault Location in Digital Logic Circuits
(Abstract)
Irith Pomeranz
Sudhakar M. Reddy
pp. 48-59
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DEPEND: A Simulation-Based Environment for System Level Dependability Analysis
(Abstract)
Kumar K. Goswami
Ravishankar K. Iyer
Luke Young
pp. 60-74
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BRIEF CONTRIBUTIONS
Nonprime Memory Systems and Error Correction in Address Translation
(Abstract)
Rajendra S. Katti
pp. 75-79
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A Cellular Structure for a Versatile Reed-Solomon Decoder
(Abstract)
Yousef R. Shayan
Tho Le-Ngoc
pp. 80-85
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Radix 2 Division with Over-Redundant Quotient Selection
(Abstract)
Hosahalli R. Srinivas
Keshab K. Parhi
Luis A. Montalvo
pp. 85-92
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On Minimizing the Lengths of Checking Sequences
(Abstract)
Hasan Ural
Xiaolin Wu
Fan Zhang
pp. 93-99
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Selective Broadcast Data Distribution Systems
(Abstract)
K. H. Yeung
T.s. Yum
pp. 100-104
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A Class of Error Control Codes for Byte Organized Memory Systems -SbEC-(Sb+S)ED Codes-
(Abstract)
Mitsuru Hamada
Eiji Fujiwara
pp. 105-109
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Design and Analysis of High Performance Multistage Interconnection Networks
(Abstract)
Suresh K. Bhogavilli
Hosame Abu-Amara
pp. 110-117
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Topologies of Combined (2logN - 1)-Stage Interconnection Networks
(Abstract)
Qing Hu
Xiaojun Shen
Jingyu Yang
pp. 118-124
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1996 Reviewers List
(Abstract)
pp. 125-128
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Peer Review Notice
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