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On the Use of Counters for Reproducing Deterministic Test Sets
December 1996 (vol. 45 no. 12)
pp. 1405-1419
ASCII Text
x 
 
Dimitrios Kagaris, Spyros Tragoudas, Amitava Majumdar, "On the Use of Counters for Reproducing Deterministic Test Sets," IEEE Transactions on Computers, vol. 45, no. 12, pp. 1405-1419, December, 1996.
 
 
BibTex
x
 
@article{ 10.1109/12.545970,
author = {Dimitrios Kagaris and Spyros Tragoudas and Amitava Majumdar},
title = {On the Use of Counters for Reproducing Deterministic Test Sets},
journal ={IEEE Transactions on Computers},
volume = {45},
number = {12},
issn = {0018-9340},
year = {1996},
pages = {1405-1419},
doi = {http://doi.ieeecomputersociety.org/10.1109/12.545970},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - JOUR
JO - IEEE Transactions on Computers
TI - On the Use of Counters for Reproducing Deterministic Test Sets
IS - 12
SN - 0018-9340
SP1405
EP1419
EPD - 1405-1419
A1 - Dimitrios Kagaris,
A1 - Spyros Tragoudas,
A1 - Amitava Majumdar,
PY - 1996
KW - Built-in self-test
KW - test pattern generation
KW - deterministic test set
KW - binary counter
KW - binary matrix column permutations.
VL - 45
JA - IEEE Transactions on Computers
ER -
 

Abstract—We propose a very simple and fast CAD tool to check whether a binary counter can reproduce a predetermined set of test patterns in a reasonable time. Given a test matrix T, the tool uses column merging, complementation, and permutation so that the distance between the starting and the finishing vector of the corresponding counter is minimized. The hardware overhead of the proposed approach is by far lower than that of any other existing approach. Although it is computationally difficult (NP-hard) to obtain the absolute minimum distance, we present an algorithm which in the absence of don't cares in the test matrix, finds an appropriate column merging, complementation, and permutation that guarantees the distance is never more than twice as large as the best possible. In the presence of don't cares, the latter algorithm forms the basis of a powerful heuristic. Experiments on various test sets on benchmark circuits show that the exact number of clock cycles needed for a binary counter to reproduce all the patterns for the hard-to-detect faults compares favorably with the expected number yielded by existing Weighted Random LFSR-based approaches which have significantly higher hardware overhead.

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Index Terms:
Built-in self-test, test pattern generation, deterministic test set, binary counter, binary matrix column permutations.
Citation:
Dimitrios Kagaris, Spyros Tragoudas, Amitava Majumdar, "On the Use of Counters for Reproducing Deterministic Test Sets," IEEE Transactions on Computers, vol. 45, no. 12, pp. 1405-1419, Dec. 1996, doi:10.1109/12.545970
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